Oxide Transistor Gate Insulation for LTPS Integration
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Solution Overview
Problem
In semiconductor devices, the use of both LTPS and oxide thin film transistors in a pixel circuit leads to a gate insulating layer being formed as a single layer, causing the oxide-semiconductor layer to exhibit a normally-on characteristic due to hydrogenation, resulting in defective products and reduced yield, especially when a normally-on characteristic is not preferred.
Innovation Solution
A semiconductor device design with separate gate insulating layers for LTPS and oxide transistors, where the oxide-semiconductor layer is formed after the hydrogenation step for the LTPS transistor, reducing exposure to hydrogen plasma and preventing the normally-on characteristic in the oxide transistor, and incorporating a two-layered metal structure to enhance integration and manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single gate insulating layer is formed for both LTPS and oxide thin film transistors, then manufacturing process is simplified, but the oxide-semiconductor layer is exposed to hydrogen atmosphere during LTPS hydrogenation step, causing normally-on characteristic and reducing device yield
Solution Approach 1:
The gate insulating layer is divided into two separate layers: a first gate insulating layer for the LTPS thin film transistor and a second gate insulating layer for the oxide thin film transistor. This segmentation prevents the oxide-semiconductor layer from being exposed to hydrogen atmosphere during LTPS hydrogenation, eliminating the normally-on characteristic while maintaining manufacturing efficiency.
Solution Approach 2:
The oxide-semiconductor layer is extracted from the common gate insulating layer structure and placed on a dedicated second gate insulating layer formed after the LTPS hydrogenation step, thereby removing it from the harmful hydrogen exposure environment.
2Ease of operation
If LTPS thin film transistor is used, then high switching performance is achieved, but long channel length is required which increases occupied area
Solution Approach 1:
Both LTPS and oxide thin film transistors are merged in a single pixel circuit, utilizing the high switching performance of LTPS TFT for switching operations and the short channel capability of oxide TFT for compact design, thereby achieving both high performance and small area occupation.
3Area of stationary object
If oxide thin film transistor is used, then short channel length and small occupied area are achieved, but low switching performance is observed
Solution Approach 1:
The pixel circuit integrates both LTPS and oxide thin film transistors, assigning LTPS TFT to roles requiring high switching performance and oxide TFT to roles benefiting from short channel and compact size, thereby combining the advantages of both transistor types.
4Ease of operation
If LTPS thin film transistor is used, then high switching performance is achieved, but hysteresis is generated in source-drain current for gate voltage
Solution Approach 1:
The pixel circuit combines LTPS and oxide thin film transistors, utilizing the low hysteresis characteristic of oxide TFT for the pixel switching transistor to improve display stability, while LTPS TFT provides high switching performance for drive circuit transistors.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design prevents the oxide transistor from having a normally-on characteristic, increases the number of transistors that can be integrated in a pixel, enhances precision, and improves the aperture ratio in transparent panels by reducing the plane area required and manufacturing costs.
Implementation Method 1
In the hydrogenation step, an oxide-semiconductor layer of an oxide thin film transistor is exposed to a hydrogen atmosphere. This results in a lowered resistance value for the oxide-semiconductor layer.
Data Source
AI summary
A semiconductor device includes an insulating substrate, a polysilicon layer on the substrate, a first-gate-insulating layer on the polysilicon layer, a first metal layer and an oxide-semiconductor layer both on the first-gate-insulating layer, a second-gate-insulating layer on the oxide-semiconductor layer, a second metal layer on the second-gate-insulating layer, a first top gate planar thin film transistor in which the polysilicon layer forms a channel with a source, drain and gate, and a second top gate thin film transistor in which the oxide-semiconductor layer forms a channel with a source, drain and gate. The source and drain of the first top gate planar thin film transistor and the gate of the second top gate thin film transistor are in the second metal layer. The source or the drain of the first top gate planar thin film transistor and the gate of the second top gate thin film transistor are electrically interconnected.