Oxide Semiconductor Transistor Manufacturing with Hard Mask
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Solution Overview
Problem
Current transistors using oxide semiconductors face challenges in achieving low parasitic capacitance, high on-state current, high frequency characteristics, and stable electric properties, which are essential for advanced semiconductor devices.
Innovation Solution
A method for manufacturing a semiconductor device involving a series of steps including forming insulators and conductors in a specific layered structure, using chemical mechanical polishing, and employing oxides like silicon oxide to reduce parasitic capacitance and enhance on-state current and frequency performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional transistor structures are used, then manufacturing is simpler, but parasitic capacitance is high and frequency characteristics are poor
Solution Approach 1:
The transistor structure is divided into multiple segments including a substrate, insulator layer, source and drain electrodes, semiconductor layer, and gate electrode arranged in specific layers. This segmentation allows each component to be optimized independently, reducing parasitic capacitance between elements while maintaining manufacturability through standardized layering processes.
2Area of moving object
If transistor size is reduced for miniaturization, then device density increases, but manufacturing precision requirements increase
Solution Approach 1:
The transistor structure employs nested layering where the gate electrode is positioned over the semiconductor layer, which is over the source and drain electrodes, all on the substrate. This nested arrangement allows compact miniaturization while maintaining clear spatial relationships between components, reducing alignment complexity despite reduced transistor area.
3Reliability
If oxide semiconductor materials are used, then low off-state current is achieved, but on-state current and frequency characteristics need improvement
Solution Approach 1:
The gate electrode is configured to apply optimized voltage parameters to the oxide semiconductor channel, and the insulator layer is designed with specific dielectric properties to enhance electric field control. These parameter changes in voltage application and material properties improve on-state current and frequency characteristics while preserving the low off-state current advantage of oxide semiconductors.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in a transistor with reduced parasitic capacitance, increased on-state current, improved frequency characteristics, and stable electric properties, enabling high-speed operation and efficient semiconductor device performance.
Implementation Method 1
performing chemical mechanical polishing on the third conductor, the sixth insulator, and the fifth insulator to expose the third insulator
Data Source
AI summary
A transistor including a semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator is manufactured by forming a hard mask layer including a fourth conductor over the second insulator, a third insulator over the fourth conductor, forming an opening portion in the second insulator with the hard mask layer as the mask, eliminating the hard mask layer by forming the opening portion, and forming the first insulator and the first conductor in the opening portion.