Oxide Semiconductor Transistor Structure Against Hydrogen Diffusion
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Solution Overview
Problem
Hydrogen diffusion into oxide semiconductor layers during fabrication and post-annealing processes leads to degradation of transistor performance due to the short channel effect, affecting the reliability and performance of semiconductor devices.
Innovation Solution
A semiconductor device design incorporating a metal oxide layer with a source/drain pattern that includes protruding portions and a ferroelectric material layer in the gate structure, along with an insulating material layer, to prevent hydrogen diffusion and enhance electrical stability, using a buffer insulating layer to suppress impurity diffusion and a contact connected to the source/drain pattern to reduce impurity infiltration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-temperature heat treatment or laser light treatment is applied to form polycrystalline silicon layer, then field-effect mobility is improved, but hydrogen diffusion into oxide semiconductor layer occurs causing short channel effect
Solution Approach 1:
A buffer layer comprising a first insulating layer and a second insulating layer is introduced as an intermediary between the oxide semiconductor layer and the polycrystalline silicon layer. The first insulating layer has a first hydrogen barrier property and the second insulating layer has a second hydrogen barrier property, together forming a composite barrier that prevents hydrogen diffusion from the polycrystalline silicon layer to the oxide semiconductor layer during high-temperature heat treatment or laser light treatment processes.
2Stability of the object's composition
If amorphous silicon layer is used in large area display device, then uniform characteristics are achieved, but field-effect mobility is limited compared to polycrystalline silicon
Solution Approach 1:
The invention changes the crystalline state parameter of the silicon layer from amorphous to polycrystalline through high-temperature heat treatment or laser light treatment, thereby improving field-effect mobility. The buffer layer with dual hydrogen barrier properties enables this parameter change while preventing the harmful side effect of hydrogen diffusion into the oxide semiconductor layer.
3Reliability
If oxide semiconductor layer is used as channel layer, then transistor performance is enhanced, but hydrogen infiltration during fabrication causes degradation
Solution Approach 1:
The buffer layer comprising first and second insulating layers with hydrogen barrier properties is formed preliminarily before the oxide semiconductor layer fabrication is completed. This preliminary protective structure prevents hydrogen infiltration into the oxide semiconductor layer during subsequent fabrication processes and post-annealing, preserving the enhanced transistor performance enabled by the oxide semiconductor channel layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively reduces hydrogen infiltration into the metal oxide layer, enhancing the performance and reliability of the semiconductor device by preventing short channel effects and maintaining electrical stability.
Implementation Method 1
an insulating material layer being in contact with the metal oxide layer, and not extending along a top surface of the source/drain pattern
Implementation Method 2
using a buffer insulating layer to suppress impurity diffusion
Implementation Method 3
a source/drain pattern being in contact with the metal oxide layer and including a portion protruding from a top surface of the metal oxide layer
Data Source
AI summary
Aspects of the present inventive concept provide a semiconductor device capable of enhancing performance and reliability through source/drain engineering in a transistor including an oxide semiconductor layer. The semiconductor device includes a substrate, a metal oxide layer disposed on the substrate, a source/drain pattern being in contact with the metal oxide layer and including a portion protruding from a top surface of the metal oxide layer, a plurality of gate structures disposed on the metal oxide layer with the source/drain pattern interposed therebetween and each including gate spacers and an insulating material layer, the insulating material layer being in contact with the metal oxide layer, and not extending along a top surface of the source/drain pattern, and a contact disposed on the source/drain pattern, the contact being connected to the source/drain pattern.


