Oxide Semiconductor Bottom-Gate Transistor Structure for Impact Resistance

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Solution Overview

Problem

Semiconductor devices with various shapes require enhanced impact resistance to withstand external forces effectively, while maintaining reliability and versatility for diverse applications.

Innovation Solution

A semiconductor device structure incorporating a bottom-gate transistor with a gate electrode layer, gate insulating layer, oxide semiconductor layer, insulating layer, and conductive layer, where the insulating layer and gate insulating layer align end-to-end over the gate electrode layer, and the conductive layer covers the channel formation region, providing comprehensive protection against impact.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If semiconductor devices are made with various shapes for diverse applications, then adaptability and versatility are improved, but impact resistance deteriorates due to increased susceptibility to external forces

Engineering Contradiction:
ImproveadaptabilityVSAvoidimpact resistance
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies beforehand cushioning by introducing an insulating layer between the oxide semiconductor layer and the gate insulating layer. This insulating layer acts as a protective cushion that absorbs and distributes impact forces before they reach the fragile oxide semiconductor layer, thereby maintaining device integrity under external stress while preserving various device shapes for diverse applications

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Object-affected harmful factors

If protective layers are added to enhance impact resistance, then impact resistance is improved, but device complexity increases due to additional layers

Engineering Contradiction:
Improveimpact resistanceVSAvoiddevice complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The insulating layer introduced in the patent serves multiple functions simultaneously: it provides mechanical protection against impact, acts as an electrical insulation barrier, and maintains the structural integrity of the device. This multi-functionality allows the device to achieve enhanced impact resistance without proportionally increasing complexity, as a single layer accomplishes multiple protective and functional roles

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11749686B2Semiconductor device and method for manufacturing the same
Publication Date: 2023.09.05 SEMICON ENERGY LAB CO LTD
  • US11749686B2 patent drawing
  • US11749686B2 patent drawing
  • US11749686B2 patent drawing

AI summary

A more convenient and highly reliable semiconductor device which has a transistor including an oxide semiconductor with higher impact resistance used for a variety of applications is provided. A semiconductor device has a bottom-gate transistor including a gate electrode layer, a gate insulating layer, and an oxide semiconductor layer over a substrate, an insulating layer over the transistor, and a conductive layer over the insulating layer. The insulating layer covers the oxide semiconductor layer and is in contact with the gate insulating layer. In a channel width direction of the oxide semiconductor layer, end portions of the gate insulating layer and the insulating layer are aligned with each other over the gate electrode layer, and the conductive layer covers a channel formation region of the oxide semiconductor layer and the end portions of the gate insulating layer and the insulating layer and is in contact with the gate electrode layer.