Oxide Semiconductor Transistor Inversion for Display Signal Delay
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Solution Overview
Problem
Inverted staggered transistors used in display devices suffer from signal delay due to parasitic capacitance, leading to degraded image quality, especially in large-screen or high-resolution displays, and occupy more area compared to planar transistors, necessitating a semiconductor device with stable semiconductor characteristics and high reliability.
Innovation Solution
A semiconductor device with a planar type top-gate structure oxide semiconductor transistor, where impurity elements like hydrogen, boron, or rare gases are introduced in regions not overlapping with the gate electrode, reducing parasitic resistance and capacitance, and the oxide semiconductor film has different atomic ratios in driver and pixel transistors to optimize performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an inverted staggered transistor structure is used, then the manufacturing process is simple and manufacturing cost is low, but signal delay increases due to parasitic capacitance between gate electrode and source/drain electrodes
Solution Approach 1:
The patent inverts the conventional transistor structure by placing the gate electrode at the top rather than at the bottom, transforming an inverted staggered structure into a planar top-gate structure. This inversion eliminates the parasitic capacitance problem while maintaining manufacturing simplicity, as the gate electrode is formed last in the process sequence, allowing straightforward fabrication without complex alignment steps.
2Ease of manufacture
If an inverted staggered transistor structure is used, then manufacturing cost is low, but the occupation area is larger compared to planar transistors
Solution Approach 1:
By inverting the gate position from bottom to top, the patent transforms the transistor into a planar structure that achieves smaller occupation area. The top-gate configuration allows for more compact layout arrangements and reduces the vertical space required, thereby decreasing the overall transistor footprint while keeping the manufacturing process simple and cost-effective.
3Area of stationary object
If a planar transistor structure is used, then the occupation area is reduced, but stable semiconductor characteristics and high reliability are not achieved with conventional structures
Solution Approach 1:
The patent applies local quality by creating distinct regions within the oxide semiconductor layer: a channel region with specific composition for stable semiconductor characteristics, and source/drain regions with different composition for low resistance. This spatial differentiation of material properties within the planar structure achieves both compact area and reliable performance, as each region is optimized for its specific function while maintaining overall device stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in a semiconductor device with high on-state current, low off-state current, stable electrical characteristics, and reduced area occupation, enabling high-resolution and large-screen display devices with improved image quality and reliability.
Implementation Method 1
impurity elements like hydrogen, boron, or rare gases are introduced in regions not overlapping with the gate electrode, reducing parasitic resistance and capacitance
Data Source
AI summary
The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. Furthermore, the first transistor provided in the driver circuit portion may include the oxide semiconductor film in which a first film and a second film are stacked, and the second transistor provided in the pixel portion may include the oxide semiconductor film which differs from the first film in the atomic ratio of metal elements.