Semiconductor Circuit Layout for Low-Leakage Oxide Transistors

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Solution Overview

Problem

Manufacturing of p-type metal oxide semiconductors, such as Zn oxide, is challenging due to issues with mobility and reliability, leading to increased leakage current in n-channel transistors and instability in semiconductor devices.

Innovation Solution

A semiconductor device is designed with a specific configuration of multiple transistors and capacitors connected in various gate and source/drain configurations, including multi-gate structures to stabilize operation and reduce leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If p-type metal oxide semiconductors (e.g., Zn oxide) are manufactured, then device functionality is achieved, but manufacturing precision and reliability deteriorate due to mobility and reliability issues

Engineering Contradiction:
Improvemanufacturability of p-type metal oxide semiconductorVSAvoidmobility and reliability of p-type metal oxide semiconductor
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent extracts the problematic p-type metal oxide semiconductor (Zn oxide) from the device structure and replaces it with an n-type metal oxide semiconductor (In-Ga-Zn oxide). This removal of the problematic component eliminates the manufacturing precision and reliability issues while maintaining the necessary device functionality through the substituted n-type semiconductor.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the fundamental parameter of semiconductor type from p-type to n-type, and modifies the compositional parameters by using In-Ga-Zn oxide instead of Zn oxide. This parameter change fundamentally alters the electrical characteristics and manufacturing behavior, achieving both ease of manufacture and high reliability simultaneously.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If n-channel transistors with n-type metal oxide semiconductors are used, then manufacturing ease is improved, but leakage current increases and stability deteriorates

Engineering Contradiction:
Improvemanufacturability of n-channel transistorVSAvoidleakage current and stability of n-channel transistor
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the material composition parameters of the n-type metal oxide semiconductor from simple In oxide or Zn oxide to a composite In-Ga-Zn oxide system. This compositional parameter change optimizes the electrical characteristics, reducing leakage current and improving stability while maintaining the ease of manufacture associated with n-type semiconductors.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite metal oxide semiconductor material (In-Ga-Zn oxide) that combines multiple metal oxides. This composite material integrates the advantages of individual components while achieving superior electrical characteristics including lower leakage current and higher stability, thus resolving the reliability issue without sacrificing manufacturing ease.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20260057828A1Semiconductor device, display apparatus, and electronic device
Publication Date: 2026.02.26 SEMICON ENERGY LAB CO LTD
  • US20260057828A1 patent drawing
  • US20260057828A1 patent drawing
  • US20260057828A1 patent drawing

AI summary

A semiconductor device includes first to tenth transistors and first to fourth capacitors. Gates of the first and the fourth transistors are electrically connected to each other. First terminals of the first, second, fifth, and eighth transistors are electrically connected to a first terminal of the fourth capacitor. A second terminal of the fifth transistor is electrically connected to a gate of the sixth transistor and a first terminal of the second capacitor. A second terminal of the eighth transistor is electrically connected to a gate of the ninth transistor and a first terminal of the third capacitor. Gates of the second, seventh, and tenth transistors are electrically connected to first terminals of the third and fourth transistors and a first terminal of the first capacitor. First terminals of the sixth and seventh transistors are electrically connected to a second terminal of the second capacitor.