Stacked Oxide Semiconductor Transistors for Leakage Reduction

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Solution Overview

Problem

Current semiconductor devices face challenges in achieving high integration, low power consumption, and high productivity while maintaining low leakage current and small area occupation.

Innovation Solution

The semiconductor device design involves stacking p-channel and n-channel transistors with wider band gap semiconductors, using oxide semiconductors for improved integration and reducing the number of masks and steps in manufacturing, and forming insulating films with different materials to create contact holes with varying depths for efficient electrode connection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If conventional semiconductor devices are designed to achieve high integration, then device area is reduced, but leakage current increases and manufacturing complexity increases

Engineering Contradiction:
Improvedevice areaVSAvoidleakage current
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent implements stacked transistor structures where p-channel and n-channel transistors are arranged in vertical layers rather than horizontal planes. This three-dimensional stacking enables high integration density while maintaining sufficient spacing and electrical isolation between transistors, thereby reducing leakage current even as device area decreases.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the semiconductor device into multiple functional layers including insulating films, conductor films, and semiconductor regions. By segmenting the device structure into discrete stacked layers with insulating films between them, the patent achieves both compact area occupation and effective electrical isolation to minimize leakage current.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If more transistors are integrated into a smaller area, then device density increases, but manufacturing steps and masks increase

Engineering Contradiction:
Improvedevice densityVSAvoidmanufacturing steps
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent combines multiple transistor types (p-channel and n-channel) into a single stacked structure that can be fabricated using shared manufacturing processes. The insulating films serve multiple functions including electrical isolation and structural support, reducing the number of separate manufacturing steps required compared to conventional lateral arrangements.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The insulating films in the stacked structure serve multiple functions: electrical isolation between transistors, mechanical support for the layered structure, and definition of conductor connections. This multi-functionality reduces manufacturing complexity by eliminating the need for separate components for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If conventional transistor structures are used, then manufacturing is simpler, but device area occupation is larger and integration is lower

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoiddevice area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent transitions from conventional two-dimensional lateral transistor arrangements to three-dimensional vertical stacking. This dimensional change enables multiple transistors to occupy a smaller footprint area while maintaining manufacturability through sequential layer formation processes that build upward from the substrate.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Reliability

If oxide semiconductors are used for transistors, then leakage current is reduced and integration is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveleakage currentVSAvoidfilm formation precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent utilizes oxide semiconductor materials with specific physical and electrical parameters that enable low leakage current. The insulating films are formed with controlled thickness and material composition parameters to achieve optimal electrical isolation while maintaining manufacturing feasibility through established thin-film deposition techniques.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10229906B2Semiconductor device including insulating film having opening portion and conductive film in the opening portion
Publication Date: 2019.03.12 SEMICON ENERGY LAB CO LTD
  • US10229906B2 patent drawing
  • US10229906B2 patent drawing
  • US10229906B2 patent drawing

AI summary

Provided is a semiconductor device that occupies a small area, a highly integrated semiconductor device, or a semiconductor device with high productivity. To fabricate an integrated circuit, a first insulating film is formed over a p-channel transistor; a transistor including an oxide semiconductor is formed over the first insulating film; a second insulating film is formed over the transistor; an opening, that is, a contact hole part of a sidewall of which is formed of the oxide semiconductor of the transistor, is formed in the first insulating film and the second insulating film; and an electrode connecting the p-channel transistor and the transistor including an oxide semiconductor to each other is formed.