Oxide-Transistor Memory Structure for Metal-Wiring Oxidation Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor memory devices using oxide semiconductor transistors face challenges in maintaining low channel leakage current during OFF operations and preventing oxidation of metal wiring layers during manufacturing, leading to characteristic deterioration.
Innovation Solution
Incorporating a first and second barrier insulating layer with low oxygen transmission rates and a cap insulating layer to control oxygen supply and prevent oxidation, along with a specific manufacturing process to compensate for oxygen loss in the oxide semiconductor layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If oxide semiconductor transistor is used in memory cell, then channel leakage current during OFF operation is extremely low, but metal wiring layers may be oxidized during manufacturing process
Solution Approach 1:
A barrier insulating layer is introduced as an intermediary between the metal wiring layer and the oxide semiconductor layer. This barrier layer prevents oxygen from reaching and oxidizing the metal wiring layer during manufacturing processes, while still allowing the oxide semiconductor transistor to function properly with its low channel leakage current characteristic.
Solution Approach 2:
The barrier insulating layer creates an inert environment for the metal wiring layer by blocking oxygen transmission. This protective barrier ensures that the metal wiring layer remains in a reduced, non-oxidized state during subsequent manufacturing steps that may involve oxygen exposure.
2Object-affected harmful factors
If barrier insulating layer is added to prevent oxidation, then metal wiring layers are protected from oxidation, but device structure becomes more complex
Solution Approach 1:
The barrier insulating layer serves multiple functions simultaneously: it acts as a diffusion barrier to prevent oxygen transmission, provides electrical insulation between the metal wiring layer and oxide semiconductor layer, and serves as a structural foundation for subsequent layer formation. This multi-functionality reduces the need for additional separate layers.
3Object-affected harmful factors
If oxygen transmission is blocked by barrier insulating layer, then metal wiring layers are protected, but oxygen supply to oxide semiconductor layer may be insufficient
Solution Approach 1:
The oxide semiconductor layer is formed first before the barrier insulating layer is deposited. This preliminary formation allows the oxide semiconductor layer to be created with the appropriate oxygen content and characteristics. The barrier layer is then added to prevent further oxygen loss during subsequent manufacturing steps.
Solution Approach 2:
The barrier insulating layer is selectively positioned between the metal wiring layer and the oxide semiconductor layer, creating localized protection where it is most needed. The barrier layer prevents oxygen transmission at the interface while allowing the bulk of the oxide semiconductor layer to maintain its required oxygen content for proper functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively maintains low channel leakage current and prevents oxidation of metal wiring layers, resulting in a semiconductor memory device with improved characteristics and reliability.
Implementation Method 1
a first and second barrier insulating layer with low oxygen transmission rates
Implementation Method 2
a cap insulating layer to control oxygen supply
Data Source
AI summary
A semiconductor memory device includes: a memory cell array including memory cells, each including an oxide semiconductor transistor; a first insulating layer disposed above the memory cell array; a first wiring layer disposed between the memory cell array and the first insulating layer; a second insulating layer extending in a vertical direction. The second insulating layer has an annular cross-section. The semiconductor memory device includes a third insulating layer further disposed over the first insulating layer, a portion of the third insulating layer being surrounded by the second insulating layer.