Oxide Transistor Passivation for Moisture and Light Stability

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Solution Overview

Problem

Transistors with oxide layers as channel layers in flat display devices face characteristic variations due to environmental factors like light and moisture, which affect their reliability.

Innovation Solution

A transistor design featuring a channel layer with ZnO-based oxides, such as HfInZnO, and a passivation layer comprising sequentially stacked silicon oxide, silicon oxynitride, and silicon nitride layers, formed using plasma-enhanced chemical vapor deposition, to minimize environmental impact on transistor characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an oxide layer is used as a channel layer to improve carrier mobility, then operating characteristics are improved, but characteristic stability deteriorates due to sensitivity to light and moisture

Engineering Contradiction:
Improveoperating characteristicsVSAvoidcharacteristic stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The passivation layer is divided into three distinct sub-layers (first, second, and third sub-layers) with different materials and functions. The first sub-layer provides general protection, the second sub-layer specifically blocks moisture, and the third sub-layer specifically blocks light, creating a segmented defense system against environmental factors

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The passivation layer uses a composite structure combining three different materials in sequence. Each material is selected for its specific properties: the first material provides baseline protection, the second material offers superior moisture barrier properties, and the third material provides light blocking capabilities, creating a composite protective system

Inventive Principle:
Principle #40Composite materials

2Device complexity

If a simple passivation structure is used, then device complexity is reduced, but protection against environmental factors is insufficient

Engineering Contradiction:
Improvepassivation structure complexityVSAvoidenvironmental factor sensitivity
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

Rather than using a single thick passivation layer, the solution segments the protection into three thinner sub-layers, each optimized for specific protective functions. This segmentation allows targeted protection against different environmental factors while maintaining overall structural simplicity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each sub-layer of the passivation structure is assigned different local qualities and properties. The first sub-layer has general protective properties, the second sub-layer has enhanced moisture barrier properties, and the third sub-layer has light-blocking properties, creating localized optimization throughout the structure

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively suppresses characteristic variations caused by environmental factors, enhancing the reliability and photoelectric stability of transistors, particularly in flat display devices.

Implementation Method 1

At least one of the silicon oxide layer, the silicon oxynitride layer, and the silicon nitride layer is formed using plasma-enhanced chemical vapor deposition (PECVD)

Methodology Applied
Scientific EffectPlasma-enhanced chemical vapor deposition: Plasma Enhanced Chemical Vapour Deposition

Data Source

PatentUS8866136B2Transistor, method of manufacturing the transistor and electronic device including the transistor
Publication Date: 2014.10.21 SAMSUNG ELECTRONICS CO LTD
  • US8866136B2 patent drawing
  • US8866136B2 patent drawing
  • US8866136B2 patent drawing

AI summary

Provided are a transistor, a method of manufacturing the transistor, and an electronic device including the transistor. The transistor may include a passivation layer on a channel layer, a source, a drain, and a gate, wherein the component of the passivation layer is varied in a height direction. The passivation layer may have a multi-layer structure including a silicon oxide layer, a silicon oxynitride layer, and a silicon nitride layer sequentially stacked. The channel layer may include an oxide semiconductor.