Oxide Semiconductor Transistor Panel Design for High Mobility

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Solution Overview

Problem

Current transistor technologies face limitations in achieving high performance due to the trade-offs between manufacturing complexity and cost, particularly in silicon-based transistors, where amorphous silicon has low charge mobility and polysilicon requires costly and complex crystallization processes, while oxide semiconductors offer higher mobility but with increased complexity.

Innovation Solution

A transistor display panel design featuring a substrate with a gate electrode, oxide semiconductor, and insulation layers, including specific contact holes and connection members to minimize semiconductor damage and improve output saturation characteristics, utilizing oxide semiconductors and insulation materials like silicon oxide and aluminum oxide to enhance transistor performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If polysilicon is used to achieve high charge mobility, then transistor performance is improved, but manufacturing cost increases and process complexity increases due to required crystallization processes

Engineering Contradiction:
Improvecharge mobilityVSAvoidcrystallization process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the material parameter from conventional silicon to oxide semiconductor, which inherently provides high charge mobility without requiring complex crystallization processes. This material substitution resolves the contradiction by achieving high mobility through different physical mechanisms inherent to oxide semiconductors.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs amorphous oxide semiconductor that can be manufactured using simpler, lower-cost processes compared to polysilicon crystallization. The amorphous state allows for easier fabrication while maintaining sufficient performance for display applications.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Ease of manufacture

If amorphous silicon is used to simplify manufacturing process, then manufacturing complexity is reduced, but charge mobility decreases limiting transistor performance

Engineering Contradiction:
Improvemanufacturing processVSAvoidcharge mobility
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the material composition from conventional amorphous silicon to amorphous oxide semiconductor. This material substitution maintains the ease of manufacturing amorphous materials while fundamentally improving charge mobility through the unique electronic properties of oxide semiconductors, particularly the higher carrier mobility inherent to the oxide semiconductor band structure.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If oxide semiconductor is used to achieve higher electron mobility, then transistor performance is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectron mobilityVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs amorphous oxide semiconductor that can be manufactured using simpler, lower-cost processes compared to crystalline oxide semiconductor. The amorphous state allows for easier fabrication using conventional thin-film deposition techniques while maintaining the high mobility advantages of oxide semiconductor material.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS10192890B2Transistor array panel and method of manufacturing thereof
Publication Date: 2019.01.29 SAMSUNG DISPLAY CO LTD
  • US10192890B2 patent drawing
  • US10192890B2 patent drawing
  • US10192890B2 patent drawing

AI summary

A transistor display panel including: a substrate; a gate electrode disposed on the substrate; a semiconductor that overlaps the gate electrode; an upper electrode disposed on the semiconductor; a source connection member and a drain connection member disposed on the same layer as the upper electrode and respectively connected with the semiconductor; a source electrode connected with the source connection member and the upper electrode; and a drain electrode connected with the drain connection member.