Oxide Semiconductor Transistor Stack to Suppress Short Channel Effects
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor technologies face challenges in maintaining and improving the characteristics of transistors while reducing their size, particularly in meeting the demands for higher performance and integration in electronic products.
Innovation Solution
A semiconductor device is designed with a substrate, a first electrode layer, an interlayer insulating layer, an oxide semiconductor layer, a gate insulating layer, and a stacked structure including gate electrodes and insulating layers, which are stacked vertically to fill the space and improve transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the size of transistor unit elements is reduced to meet miniaturization demands, then integration density increases, but maintaining and improving transistor characteristics becomes difficult
Solution Approach 1:
The patent transitions from planar transistor structures to vertically stacked three-dimensional structures. Multiple gate electrodes are stacked in the vertical direction above the channel layer, creating a multi-layer gate configuration that increases the effective gate control area without increasing the planar footprint. This dimensional transition allows simultaneous achievement of miniaturization and improved transistor characteristics through enhanced gate control.
Solution Approach 2:
The patent employs composite material structures including oxide semiconductor layers combined with multiple insulating layers and conductive gate electrodes. The channel layer uses oxide semiconductor materials (such as IGZO) which provide superior electrical characteristics, while stacked insulating layers with different dielectric properties enable optimized electrical field distribution. This composite structure maintains reliable transistor characteristics in miniaturized devices.
2Ease of manufacture
If conventional transistor structures are used, then manufacturing processes are simpler, but Schottky barrier effects and short channel effects degrade device performance
Solution Approach 1:
The gate structure is segmented into multiple independent gate electrodes stacked vertically, each capable of being controlled independently. This segmentation allows the device to overcome Schottky barrier effects at electrode-channel interfaces by distributing the control function across multiple gates, and mitigates short channel effects through enhanced vertical field control. The segmented gate structure can be integrated into existing manufacturing processes while significantly improving device performance.
Data Source
AI summary
A semiconductor device includes a substrate; a first electrode layer disposed over the substrate; an interlayer insulating layer having an opening that exposes the first electrode layer; an oxide semiconductor layer formed along a surface of the opening and connected to the first electrode layer; a gate insulating layer formed along a surface of the oxide semiconductor layer; a stacked structure including a first gate electrode layer, a first insulating layer, a second gate electrode layer, and a second insulating layer stacked in a vertical direction while filling a remaining space of the opening in which the oxide semiconductor layer and the gate insulating layer are formed; and a second electrode layer disposed over the stacked structure and the oxide semiconductor layer and connected to the oxide semiconductor layer.