Oxide Semiconductor Transistor Structure for Low Characteristic Variation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor devices face challenges in achieving small variations in transistor characteristics, high on-state current, favorable electrical characteristics, miniaturization, high integration, high reliability, and low power consumption.

Innovation Solution

A semiconductor device is designed with a specific structure including a first insulator, a first oxide, a first conductor, a second conductor, and a second oxide positioned between the conductors over the first oxide, with a second insulator and a third conductor on top. The top surface of the first oxide under the third conductor is lower than under the first conductor, with a curved surface having a curvature radius between 1 nm and 15 nm.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conventional transistor structure is used, then manufacturing is simpler, but transistor characteristic variation is large

Engineering Contradiction:
Improvetransistor characteristic variationVSAvoidoxide layer structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating different oxide layer configurations in different regions: a first oxide layer is formed in the channel formation region, while a second oxide layer is formed in the source and drain regions. This local differentiation optimizes transistor characteristics by reducing variation while maintaining manufacturability through region-specific material properties.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The oxide semiconductor layer is segmented into multiple distinct layers (first oxide layer in channel region, second oxide layer in source/drain regions) with different compositions and properties. This segmentation allows independent optimization of each region's characteristics, reducing overall transistor variation while keeping the manufacturing process manageable.

Inventive Principle:
Principle #1Segmentation

2Area of moving object

If transistor size is reduced for miniaturization, then integration density increases, but on-state current decreases

Engineering Contradiction:
Improvetransistor sizeVSAvoidon-state current
Core Design Contradiction:
Area of moving objectVSPower

Solution Approach 1:

The patent changes material parameters by using different oxide compositions in different regions. The first oxide layer in the channel region has specific properties that maintain high on-state current, while the second oxide layer in source/drain regions has properties that facilitate carrier injection. This parameter differentiation allows miniaturized transistors to maintain adequate current levels.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The transistor employs composite oxide semiconductor materials with different compositions and crystalline structures in different regions. The channel region uses a specific oxide composition optimized for carrier transport, while source/drain regions use different compositions optimized for carrier injection, enabling miniaturization without severe current loss.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS12218246B2Semiconductor device and method for manufacturing semiconductor device
Publication Date: 2025.02.04 SEMICON ENERGY LAB CO LTD
  • US12218246B2 patent drawing
  • US12218246B2 patent drawing
  • US12218246B2 patent drawing

AI summary

A semiconductor device in which a variation of transistor characteristics is small is provided. The semiconductor device includes a transistor. The transistor includes a first insulator, a first oxide over the first insulator, a first conductor, a second conductor, and a second oxide, which is positioned between the first conductor and the second conductor, over the first oxide, a second insulator over the second oxide, and a third conductor over the second insulator. A top surface of the first oxide in a region overlapping with the third conductor is at a lower position than a position of a top surface of the first oxide in a region overlapping with the first conductor. The first oxide in the region overlapping with the third conductor has a curved surface between a side surface and the top surface of the first oxide, and the curvature radius of the curved surface is greater than or equal to 1 nm and less than or equal to 15 nm.