Oxide Semiconductor Channel Trench Grain Layout for Leakage Control
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Solution Overview
Problem
Existing semiconductor devices face challenges in controlling leakage current characteristics, particularly with the high integration of semiconductor devices, where oxide semiconductor materials are being researched for their potential in reducing leakage current while maintaining on-current similar to silicon.
Innovation Solution
A semiconductor device is designed with a substrate, conductive lines, an isolation insulating layer defining a channel trench, a crystalline oxide semiconductor layer extending along the inner side and bottom surfaces of the channel trench, and a gate electrode. The crystalline oxide semiconductor layer has varying grain sizes, with a larger grain size adjacent to the inner side surface of the channel trench and a smaller grain size adjacent to the bottom surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If oxide semiconductor material is used for channel layer, then leakage current is reduced, but on-current control becomes challenging
Solution Approach 1:
The patent applies local quality by creating different grain sizes in different regions of the oxide semiconductor layer. The first region (adjacent to gate electrode) has a first grain size optimized for on-current control, while the second region (adjacent to source/drain electrodes) has a second grain size optimized for leakage current reduction. This spatial variation in material properties allows simultaneous optimization of both on-current and leakage current characteristics.
2Productivity
If high integration is implemented, then device density increases, but leakage current control deteriorates
Solution Approach 1:
The patent divides the oxide semiconductor layer into regions with different grain sizes tailored to specific functional requirements. The first region near the gate electrode uses a grain size that maintains good on-current characteristics even at high integration, while the second region near source/drain uses a different grain size to minimize leakage current. This localized optimization enables high device density while maintaining leakage current control.
3Ease of manufacture
If uniform grain size is used in oxide semiconductor layer, then manufacturing is simplified, but electrical characteristics are compromised
Solution Approach 1:
The patent implements local quality by specifying different grain sizes for different regions of the oxide semiconductor layer. The first region adjacent to the gate electrode has a first grain size that optimizes on-current characteristics, while the second region adjacent to source/drain electrodes has a second grain size that optimizes leakage current characteristics. This region-specific grain size control achieves superior electrical characteristics while remaining manufacturable through controlled deposition and annealing processes.
Data Source
AI summary
A semiconductor device includes: a substrate; a conductive line extending on the substrate in a first horizontal direction; an isolation insulating layer extending on the substrate and the conductive line in a second horizontal direction intersecting with the first horizontal direction, and defining a channel trench extending through the isolation insulating layer from an upper surface of the isolation insulating layer to a lower surface of the isolation insulating layer; a crystalline oxide semiconductor layer extending along at least a portion of an inner side surface of the channel trench and at least a portion of a bottom surface of the channel trench and coming in contact with the conductive line; and a gate electrode extending on the crystalline oxide semiconductor layer inside the channel trench in the second horizontal direction.