Sidewall-Oxidized Floating-Gate Dielectric for Scaled Coupling
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Solution Overview
Problem
The scaling down of semiconductor devices poses challenges in achieving improved quality, yield, performance, and reliability while maintaining reduced complexity, particularly in achieving effective capacitive coupling between control and memory units.
Innovation Solution
A semiconductor device design featuring a substrate with a tunneling insulating layer, a floating gate, and a lateral oxidized intervention layer with a higher oxygen concentration at the sidewall portion, which enhances capacitive coupling through a lateral oxidation process between 300° C and 600° C, and a control gate structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the dimensions of semiconductor devices are scaled down, then computing ability is improved, but quality, yield, performance, and reliability deteriorate
Solution Approach 1:
The patent applies local quality by creating a lateral oxidized intervention layer with non-uniform oxygen concentration distribution. The sidewall portions have higher oxygen concentration than the center portion, providing localized electrical characteristics that improve capacitive coupling and device reliability while maintaining scaled dimensions
Solution Approach 2:
The patent changes the oxygen concentration parameter within the dielectric layer by performing lateral oxidation at controlled temperatures (300-600° C.). This parameter change creates regions with different electrical properties, enabling improved performance and reliability in scaled devices
2Volume of moving object
If the dimensions of semiconductor devices are scaled down, then device size is reduced, but capacitive coupling between control and memory units deteriorates
Solution Approach 1:
The lateral oxidized intervention layer creates localized regions with different oxygen concentrations, where sidewall portions have higher oxygen content to enhance capacitive coupling between control and memory units, while the center portion maintains lower oxygen content for proper dielectric function
Solution Approach 2:
The patent introduces a compositional gradient dimension within the dielectric layer by varying oxygen concentration from sidewalls to center, adding a new degree of freedom for controlling electrical characteristics independent of device geometric dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased oxygen concentration in the lateral oxidized intervention layer improves capacitive coupling, leading to enhanced electron transfer and performance of the semiconductor device.
Implementation Method 1
performing a lateral oxidation process over the substrate, wherein a process temperature of the lateral oxidation process is between about 300° C. and about 600° C.
Data Source
AI summary
The present application discloses a method for fabricating a semiconductor device with an oxidized intervention layer. The method includes providing a substrate; forming a tunneling insulating layer over the substrate; forming a floating gate over the tunnel oxide layer; forming a dielectric layer over the floating gate; forming a control gate over the dielectric layer; and performing a lateral oxidation process over the substrate, wherein a process temperature of the lateral oxidation process is between about 300° C. and about 600° C.