Oxidized Silicon Liner in Fin Isolation to Cut Charge Trapping
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Solution Overview
Problem
Existing FinFET manufacturing processes face challenges in generating beneficial strain in the channel region and reducing charge trapping, leading to suboptimal transistor performance due to the use of materials like silicon nitride that introduce high trap densities and leakage currents.
Innovation Solution
The formation of a silicon liner followed by oxidation into a silicon oxide liner within isolation regions, which generates beneficial strain in the channel of the FinFET, reducing charge trapping and improving transistor performance by using silicon oxide as a barrier material.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon nitride is used as the isolation region material, then the isolation region provides good electrical isolation, but it introduces high trap densities and leakage currents that degrade transistor performance
Solution Approach 1:
The patent removes silicon nitride from the isolation region and replaces it with silicon oxide, extracting the harmful charge trapping properties while maintaining the electrical isolation function through an alternative material
Solution Approach 2:
The patent changes the material composition parameter of the isolation region from silicon nitride to silicon oxide, fundamentally altering the electrical and chemical properties to eliminate trap densities while preserving isolation functionality
2Reliability
If a silicon liner is oxidized to form silicon oxide liner, then beneficial tensile strain is generated in the channel improving transistor performance, but the process adds manufacturing steps and complexity
Solution Approach 1:
The patent combines the silicon liner deposition and oxidation steps into the existing isolation region formation process, merging multiple functions into a unified manufacturing sequence that achieves both strain generation and isolation formation
Solution Approach 2:
The patent performs preliminary deposition of the silicon liner before the final isolation region formation, preparing the structure in advance to enable subsequent oxidation that generates the desired tensile strain in the channel
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances tensile strain and reduces charge trapping, resulting in improved performance of the resulting FinFETs by up to 0.3% tensile stress, thereby optimizing the transistor's operational efficiency.
Implementation Method 1
oxidizing the silicon-containing layer to form a liner. The liner comprises oxidized silicon
Implementation Method 2
oxidizing the silicon-containing layer to form a liner
Data Source
AI summary
A method includes etching a semiconductor substrate to form a trench and a semiconductor strip. A sidewall of the semiconductor strip is exposed to the trench. The method further includes depositing a silicon-containing layer extending into the trench, wherein the silicon-containing layer extends on the sidewall of the semiconductor strip, filling the trench with a dielectric material, wherein the dielectric material is on a sidewall of the silicon-containing layer, and oxidizing the silicon-containing layer to form a liner. The liner comprises oxidized silicon. The liner and the dielectric material form parts of an isolation region. The isolation region is recessed, so that a portion of the semiconductor strip protrudes higher than a top surface of the isolation region and forms a semiconductor fin.