3D Non-Volatile Memory Stack With Oxygen-Gradient Channel Layers

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Solution Overview

Problem

The integration density of two-dimensional non-volatile memory devices is limited, leading to the development of three-dimensional non-volatile memory devices with stacked memory cells, but existing structures and manufacturing methods do not adequately address operational reliability and manufacturing ease.

Innovation Solution

A semiconductor device with a stack structure of alternately stacked conductive and insulating layers, featuring a first channel layer with higher oxygen content and different thickness than a second channel layer, and a tunnel insulating layer with varying metal concentrations, enhancing carrier mobility and reducing leakage current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If two-dimensional non-volatile memory devices are used, then manufacturing processes are simple, but integration density is limited

Engineering Contradiction:
Improveintegration densityVSAvoiddevice structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent transitions from two-dimensional memory cell arrangement to three-dimensional stacked structure, where memory cells are arranged vertically across multiple layers. This dimensional change enables significant increase in integration density by utilizing the vertical space above the substrate, allowing multiple memory cells to be stacked in the thickness direction rather than only spreading them out in the planar direction.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If three-dimensional stacked structure is implemented, then integration density increases, but manufacturing complexity increases

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing process
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The memory device is divided into multiple discrete layers including first and second channel layers, tunnel insulating layers, data storage layers, and block insulating layers. Each layer can be formed through separate deposition processes, allowing independent optimization and control of each component's properties and thickness, which simplifies the overall manufacturing complexity despite the three-dimensional structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs composite material structures such as metal oxide-based semiconductors combined with specific insulating materials for tunnel and block insulating layers. These composite structures provide tailored electrical and physical properties that enable reliable three-dimensional operation while maintaining manufacturability through established thin-film deposition techniques.

Inventive Principle:
Principle #40Composite materials

3Reliability

If channel layers have uniform composition, then manufacturing is easier, but carrier mobility is reduced

Engineering Contradiction:
Improvecarrier mobilityVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The channel layers are designed with non-uniform oxygen content distribution, where different regions of the channel layer have different oxygen concentrations to optimize carrier mobility in specific areas. This local variation in composition allows enhancement of electrical properties where needed while maintaining overall structural integrity and manufacturability through controlled deposition parameters.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11201214B2Semiconductor device and manufacturing method of the semiconductor device
Publication Date: 2021.12.14 SK HYNIX INC
  • US11201214B2 patent drawing
  • US11201214B2 patent drawing
  • US11201214B2 patent drawing

AI summary

A semiconductor device includes a stack structure including conductive layers and insulating layers that are alternately stacked with each other, a first channel layer passing through the stack structure and including a metal oxide-based semiconductor, and a second channel layer adjacent to the first channel layer and including the metal oxide-based semiconductor, wherein the first channel layer has a higher oxygen content than the second channel layer and has a different thickness from the second channel layer.