Oxynitride Spacer Reduces Parasitic Capacitance in CMOS Devices
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Solution Overview
Problem
Conventional CMOS devices using pure nitride spacers exhibit high parasitic capacitance, which slows down transistor operation due to the high dielectric constant of silicon nitride, necessitating a spacer material with lower capacitance to enhance operational speed.
Innovation Solution
The use of oxynitride (SiOxNy) or carbon-doped oxynitride (SiOxNyCz) spacers, deposited using low-pressure chemical vapor deposition with specific gas ratios, reduces parasitic capacitance by adjusting the oxygen to nitrogen ratio, resulting in a lower dielectric constant and improved transistor speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pure nitride spacers are used to define deep source and drain regions, then the spacer effectively serves its structural purpose, but the parasitic capacitance becomes undesirably high
Solution Approach 1:
The patent changes the compositional parameters of the spacer material from pure nitride (Si3N4) to oxynitride (SiOxNy) by adjusting the oxygen to nitrogen ratio during deposition. This parameter change reduces the dielectric constant from 7.5 to a lower value, thereby reducing parasitic capacitance while maintaining the spacer's structural function in defining deep source and drain regions
Solution Approach 2:
The patent employs composite oxynitride material combining silicon, oxygen, and nitrogen in specific ratios (SiOxNy where x and y are non-zero) to create a spacer that simultaneously provides structural definition capability and reduced dielectric constant. This composite approach allows optimization of both mechanical/structural properties and electrical properties
2Ease of manufacture
If pure nitride spacers are used, then the fabrication process is simple, but the transistor operation speed is slowed due to high parasitic capacitance
Solution Approach 1:
The patent modifies the deposition process parameters by adjusting the oxygen to nitrogen gas ratio during chemical vapor deposition to control the oxynitride composition. This parameter adjustment reduces the dielectric constant of the spacer material, thereby reducing parasitic capacitance and increasing transistor switching speed while maintaining process integration simplicity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The oxynitride spacers significantly reduce parasitic capacitance by 10-17% and enhance transistor switching speed, while being easily integratable into existing manufacturing processes, with improved boron retention and reduced dopant loss.
Implementation Method 1
depositing an oxynitride (SiOxNy) layer atop the first layer
Data Source
AI summary
A complementary metal oxide semiconductor (CMOS) device has a substrate 100, a gate structure 108 disposed atop the substrate, and spacers 250, deposited on opposite sides of the gate structure 108 to govern formation of deep source drain regions S, D in the substrate. Spacers 250 are formed of an oxynitride (SiOxNyCz) wherein x and y are non-zero but z may be zero or greater; such oxynitride spacers reduce parasitic capacitance, thus improving device performance. A method of fabricating a portion of a complementary metal oxide semiconductor (CMOS) device involves providing a substrate 100, forming a gate structure 108 over the substrate, depositing a first layer 104 atop the substrate on opposite sides of the gate structure to govern formation of deep source drain regions in the substrate, depositing an oxynitride (SiOxNyCz) layer 250 atop the first layer (in which x and y are non-zero but z may be zero or greater), depositing a second layer 112 atop the oxynitride layer, and depositing a nitride layer 114B atop the second layer.