p-GaN Gate GaN Structure With Maskless Regrowth Access Regions
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Solution Overview
Problem
Current GaN-based enhancement-mode semiconductor devices face challenges in achieving high threshold voltage, low on-resistance, and stable operation due to issues with etching uniformity, lattice damage, and doping nonuniformity, particularly in p-type gate structures, which affect the performance and reliability of AlGaN/GaN heterostructure devices.
Innovation Solution
The solution involves a semiconductor device structure with a nitride epitaxial layer stack that includes a nitride nucleation layer, stress buffer layer, channel layer, primary and secondary epitaxial nitride barrier layers, and a p-type nitride layer, where the p-type layer is reserved only in the gate electrode region, allowing for maskless secondary epitaxial growth and direct contact with the gate electrode metal, thereby reducing etching damage and improving conductivity and switch-off capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If etching-based technical solutions are used to remove p-GaN material in access region, then the device can be realized easily, but etching uniformity is poor and over-etching problem exists causing lattice damage
Solution Approach 1:
A thin AlN layer is introduced as an intermediary between the p-GaN layer and the AlGaN barrier layer. This AlN layer serves as a protective intermediary that prevents direct etching contact with the AlGaN barrier layer, thereby avoiding lattice damage and over-etching problems while maintaining the ease of etching removal of the p-GaN material in access regions.
Solution Approach 2:
The device structure is segmented into distinct regions: gate electrode region where p-GaN is retained, and access regions where p-GaN is removed. This segmentation allows different etching treatments for different regions, achieving precise control over where the p-GaN material remains or is removed without affecting the overall manufacturing ease.
2Manufacturing precision
If selective-area p-GaN growth technology is used, then p-GaN layer can be formed in gate electrode region without p-GaN layer in access region, but growth rate control is difficult when gate length is small
Solution Approach 1:
The p-GaN layer is grown preliminarily across the entire device area before any removal processes. This preliminary action ensures uniform formation of the p-GaN layer in the gate electrode region, and subsequent selective removal in access regions achieves the desired spatial distribution without the difficulty of controlling growth rate in small gate length devices.
Solution Approach 2:
Instead of selectively growing p-GaN only in the gate electrode region (selective-area growth), the invention inverts the approach by growing p-GaN everywhere and then selectively removing it from access regions. This inversion simplifies the growth process while achieving the same functional result.
3Manufacturing precision
If SiO2 mask layer is used for selective-area growth, then patterned mask can be formed, but SiO2 decomposes at high temperatures causing leakage current
Solution Approach 1:
The problematic SiO2 mask layer is completely removed from the final device structure. Instead of leaving the mask layer in place, the invention extracts it after serving its patterning function, eliminating the source of high-temperature decomposition and leakage current while maintaining the precision benefits of patterned masking during fabrication.
Solution Approach 2:
The pattern information from the SiO2 mask layer is transferred to the p-GaN layer and AlN layer through etching processes. Once the pattern is copied onto the functional layers, the original SiO2 mask is removed, preserving the pattern precision while eliminating the reliability issues of the mask material.
4Stability of the object's composition
If p-type gate structure is used to realize normally-off device, then threshold voltage stability is improved, but additional defect energy levels are introduced by etching
Solution Approach 1:
The thin AlN layer serves as a protective intermediary that prevents direct etching contact with the AlGaN barrier layer and 2DEG channel. This intermediary layer absorbs the mechanical stress and chemical damage from etching processes, thereby preventing the introduction of defect energy levels while maintaining the threshold voltage stability provided by the p-type gate structure.
Solution Approach 2:
The AlN layer is deposited beforehand to cushion and protect the underlying AlGaN barrier layer and 2DEG channel from etching damage. This prior cushioning prevents the introduction of defect energy levels during subsequent etching processes, ensuring the reliability of the electric characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the realization of enhancement-mode semiconductor devices with high threshold voltage, low leakage current, and improved stability by optimizing the design of nitride barrier layers and eliminating mask influence, resulting in enhanced switch-off characteristics and conductivity.
Implementation Method 1
a secondary epitaxial nitride barrier layer is grown on the primary epitaxial barrier layer and the p-type nitride layer in the gate electrode region
Data Source
AI summary
The present invention relates to an enhancement-mode semiconductor device and a preparation method therefor. The device includes a substrate, a semiconductor epitaxial layer, a gate electrode, a source electrode, and a drain electrode. The epitaxial layer includes a nitride nucleation layer, a nitride stress buffer layer, a nitride channel layer, a primary epitaxial nitride barrier layer, a p-type nitride layer and a secondary epitaxial nitride barrier layer. By means of etching, the p-type nitride in a gate electrode region is reserved, realizing the depletion of a gate electrode channel. By means of maskless regrowth, the secondary epitaxial nitride barrier layer is grown on the primary epitaxial barrier layer and the p-type nitride layer in the gate electrode region, realizing a high-conduction access region.