P-type Circuit Stage for Reliable Scan Driver Signals
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing circuit stages for organic light-emitting display devices face challenges in securing the reliability of driving when implemented using N-type transistors, leading to difficulties in supplying high-level scan signals effectively.
Innovation Solution
A circuit stage is designed using P-type transistors, incorporating a first transistor, an output circuit, an input circuit, a first driving circuit, and a second driving circuit, which collectively control voltages and supply scan signals to scan lines in accordance with specific clock signals and power voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If N-type transistors are used to implement circuit stages, then leakage current is minimized, but driving reliability deteriorates
Solution Approach 1:
The patent changes the electrical parameters by switching from N-type to P-type transistors, altering the conduction characteristics to achieve both low leakage and high reliability. P-type transistors inherently provide lower off-state leakage while maintaining robust drive capability, resolving the contradiction between minimizing leakage and ensuring driving reliability.
2Reliability
If P-type transistors are used to implement circuit stages, then driving reliability is improved, but leakage current increases
Solution Approach 1:
The patent optimizes P-type transistor parameters including threshold voltage, channel width, and length to minimize leakage while maintaining driving reliability. By carefully selecting and adjusting these parameters, the design achieves low leakage current comparable to N-type transistors while retaining the inherent reliability advantages of P-type devices.
3Manufacturing precision
If circuit stages are designed to supply high-level scan signals, then scan signal quality is improved, but circuit complexity increases
Solution Approach 1:
The patent divides the circuit stage into multiple functional blocks including input circuits, output circuits, and driving circuits. Each block performs a specific function in processing and transmitting scan signals, which simplifies the overall design while ensuring high signal quality through modular optimization of each segment.
Solution Approach 2:
The patent introduces intermediate buffering and level-shifting circuits between signal stages. These intermediary components ensure proper signal levels and impedance matching, improving scan signal quality while keeping each individual circuit block relatively simple and manageable.
Data Source
AI summary
A circuit stage including a first transistor including a first electrode and a gate electrode, the first electrode being coupled to a first input terminal and the gate electrode being coupled to a second input terminal configured to receive a first clock signal, an output circuit coupled to the second input terminal and a second power input terminal, an input circuit coupled to a second electrode of the first transistor and to a third input terminal, the third input terminal being configured to receive a first control clock signal, the input circuit being configured to control voltages of the second node and a third node, a first driving circuit coupled to a first power input terminal and to a fourth input terminal configured to receive a second control clock signal, and a second driving circuit coupled to the fourth input terminal and the third node.