P-Type Doped Control Gate for Flash Memory Cell Endurance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As flash memory cell size decreases, it becomes challenging to maintain the conductivity of n-doped control gates while avoiding the creation of depletion regions, leading to increased cell-to-cell interference and reduced endurance in memory devices.
Innovation Solution
Implementing a p-type doped control gate doped with group III elements like boron, aluminum, or gallium to a concentration of approximately 5×10^19 atoms/cm^3, which is annealed for electrical activation, providing improved gate coupling and reduced tunneling currents between the control gate and floating gate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the pitch between floating gates is reduced to support cell size reduction, then the cell size is reduced, but the ability to dope the control gate heavily enough to maintain conductivity while avoiding depletion regions deteriorates
Solution Approach 1:
The patent changes the doping type parameter from n-type to p-type, which fundamentally alters the electrical characteristics of the control gate. This parameter change allows the control gate to maintain conductivity at reduced pitch dimensions without forming depletion regions, as p-type doping responds differently to the scaled geometry while preserving the necessary electrical properties for flash memory operation
2Volume of moving object
If the pitch between floating gates is reduced to support cell size reduction, then the cell size is reduced, but the creation of depletion regions adjacent to the interpolydielectric layer increases
Solution Approach 1:
By changing the doping type from n-type to p-type, the patent alters the physical behavior of the control gate material. This parameter change prevents the formation of harmful depletion regions at the interface with the interpolydielectric layer, as p-type doping does not create the same depletion effects under the scaled geometry conditions, thereby eliminating this harmful factor while maintaining small cell dimensions
3Quantity of substance
If n-type doping is used in the control gate, then the control gate can be doped heavily, but cell-to-cell interference increases and endurance decreases
Solution Approach 1:
The patent inverts the doping type from n-type to p-type, fundamentally reversing the electrical characteristics of the control gate. This inversion changes how the control gate interacts with adjacent cells, suppressing the harmful cell-to-cell interference effects that occur with n-type doping, while maintaining the necessary dopant concentration for proper device operation and improving overall endurance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The p-type doped control gate enhances the coupling ratio, suppresses direct tunneling currents, and increases the threshold voltage, thereby improving flash memory cell endurance and minimizing cell-to-cell interference.
Implementation Method 1
a control gate doped with a p-type dopant... Implementing a p-type doped control gate doped with group III elements like boron, aluminum, or gallium
Implementation Method 2
which is annealed for electrical activation
Data Source
AI summary
Embodiments of an apparatus and methods for providing improved flash memory cell characteristics are generally described herein. Other embodiments may be described and claimed.