P-Type Iridium Oxide Semiconductor for Wide-Bandgap Conductivity

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Solution Overview

Problem

Existing p-type oxide semiconductors, such as Rh2O3 and ZnRh2O4, suffer from low mobility, narrow band gaps, and poor electrical properties, making them unsuitable for applications like LEDs and power devices, while other materials like Ir2O3 are not known to be p-type semiconductors, and conventional methods fail to produce functional p-type semiconductors with gallium oxide.

Innovation Solution

A p-type oxide semiconductor with a wide bandgap of 2.4 eV or more and enhanced electrical conductivity of 2 cm²/Vs or more is achieved by forming a film of a metal oxide containing iridium through a method involving atomizing a raw material solution, carrying the droplets onto a base using a carrier gas, and inducing a thermal reaction to form a crystalline oxide semiconductor with a corundum or β-gallia structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If an n-type oxide semiconductor is used, then high electron mobility can be achieved, but the transistor exhibits significant off-state current and threshold voltage instability

Engineering Contradiction:
Improveelectron mobilityVSAvoidthreshold voltage stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent changes the carrier type parameter from n-type to p-type by adjusting the doping elements and oxidation conditions. This fundamental parameter change allows achieving both acceptable mobility and stable threshold voltage characteristics that are incompatible in n-type semiconductors

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses composite material structures including stacked oxide semiconductor layers with different compositions (e.g., In-Ga-Zn-O and In-Al-Zn-O layers) and combines oxide semiconductors with specific doping elements (Ga, Ge, Sn) to achieve both high mobility and stable electrical characteristics

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If a top gate structure is used, then planarization is easier, but the gate voltage does not effectively reach the semiconductor interface

Engineering Contradiction:
ImproveplanarizationVSAvoidgate voltage control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent introduces an intermediary conductive layer (e.g., Mo, W, TiN, or doped oxide semiconductor layer) between the top gate electrode and the oxide semiconductor. This intermediary layer serves as a voltage transmission medium that effectively delivers gate voltage to the semiconductor interface while maintaining the planarization advantages of the top gate structure

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If sputtering is used for oxide semiconductor formation, then film quality is good, but hydrogen and hydroxyl groups are incorporated

Engineering Contradiction:
Improvefilm qualityVSAvoidhydrogen incorporation
Core Design Contradiction:
Manufacturing precisionVSLoss of substance

Solution Approach 1:

The patent converts the harmful effect of hydrogen incorporation by using it intentionally for hydrogen termination of dangling bonds at film interfaces. This controlled hydrogen incorporation passivates interface states and reduces trap levels, transforming a defect into a beneficial interface treatment

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent changes the sputtering parameters including using oxygen-rich sputtering gas mixtures, adjusting power density, and controlling substrate temperature to minimize unwanted hydrogen incorporation while maintaining film quality

Inventive Principle:
Principle #35Parameter changes

4Productivity

If FETs are formed in advance before oxide semiconductor formation, then process sequence is simplified, but plasma damage occurs on the FETs

Engineering Contradiction:
Improveprocess sequence efficiencyVSAvoidFET performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary protective actions to the FET structures before oxide semiconductor formation, including forming protective layers and optimizing plasma conditions in advance to prevent damage during subsequent processing steps

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces cushioning measures such as protective capping layers and optimized plasma processing sequences that cushion the FET structures from damaging effects during the oxide semiconductor formation process

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The resulting p-type oxide semiconductor exhibits improved semiconductor properties with high mobility and wide bandgap, suitable for applications in power devices and other semiconductor devices.

Implementation Method 1

it has been found that when a semiconductor layer made of an oxide semiconductor doped with gallium (Ga), germanium (Ge), or tin (Sn) is used as an active layer of a transistor, the transistor can have a low off-state current

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 2

the oxide semiconductor may be oxidized by being exposed to oxygen plasma or an oxygen atmosphere

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentEP3509090B1Semiconductor device comprising p-type oxide semiconductor and semiconductor system comprising same
Publication Date: 2026.04.29 FLOSFIA
  • EP3509090B1 patent drawingFigure 1~2
  • EP3509090B1 patent drawingFigure 3
  • EP3509090B1 patent drawingFigure 4

AI summary

A new and useful p-type oxide semiconductor with a wide band gap and an enhanced electrical conductivity and the method of manufacturing the p-type oxide semiconductor are provided. A method of manufacturing a p-type oxide semiconductor including: generating atomized droplets by atomizing a raw material solution including iridium and a metal that is different from iridium and optionally contained; carrying the atomized droplets onto a surface of a base by using a carrier gas; causing a thermal reaction of the atomized droplets adjacent to the surface of the base to form a crystal or a mixed crystal of a metal oxide including iridium.