P-Type Shift Register Circuit for Narrow-Frame Display Panels

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Solution Overview

Problem

The circuit structure of shift registers in display panels is complex, requiring numerous transistors, including both N-type and P-type, which affects reliability and occupies a large frame width, making narrow frame designs difficult.

Innovation Solution

The shift register design includes a driving unit and a gating unit with simplified internal structure, using P-type transistors only, and controlling output signals through multiple nodes to reduce complexity and improve reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional shift register circuit structure is used with N-type and P-type transistors, then the circuit can achieve basic shift function, but the device complexity increases and reliability decreases

Engineering Contradiction:
Improvecircuit reliabilityVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies homogeneity by using only P-type transistors throughout the shift register circuit, eliminating the need for both N-type and P-type transistors as in traditional designs. This uniform transistor type simplifies the circuit structure, improves reliability by reducing variability, and maintains the essential shift register functionality through carefully designed control nodes and signal paths.

Inventive Principle:
Principle #33Homogeneity

2Length of stationary object

If traditional shift register with multiple transistor types is used, then the shift function is achieved, but the frame width occupied is large

Engineering Contradiction:
Improveframe widthVSAvoidtransistor arrangement complexity
Core Design Contradiction:
Length of stationary objectVSDevice complexity

Solution Approach 1:

By using only P-type transistors, the patent reduces the variety of components that need to be arranged, allowing for a more compact and simplified layout that occupies less frame width while maintaining the shift register's operational capabilities.

Inventive Principle:
Principle #33Homogeneity

3Length of stationary object

If simplified shift register structure is used, then the frame width is reduced, but the operational reliability must be maintained

Engineering Contradiction:
Improveframe widthVSAvoidoperational reliability
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The homogeneous P-type transistor design reduces frame width while maintaining reliability through consistent device characteristics and simplified signal control mechanisms.

Inventive Principle:
Principle #33Homogeneity

Solution Approach 2:

The patent incorporates feedback mechanisms through control nodes that monitor and adjust signal levels, ensuring reliable operation despite the simplified structure. The control nodes provide feedback control to maintain proper signal transitions and prevent errors in the shift register operation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12424157B2Display panel, method for driving the same and display apparatus
Publication Date: 2025.09.23 XIAMEN TIANMA DISPLAY TECH CO LTD
  • US12424157B2 patent drawing
  • US12424157B2 patent drawing
  • US12424157B2 patent drawing

AI summary

A display panel includes a shift register including stages of shift circuits arranged in cascade. At least one of the shift circuits includes a driving unit and a gating unit. The driving unit has a first node and a second node, outputs a second level when a potential of the first node is a first level, and outputs the first level when a potential of the second node is the first level. The gating unit includes a first control module and a gating output module. The first control module writes a signal of the first node into a third node when a frequency control signal received by the first control module is the first level. The gating output module outputs the second level when a potential of the third node is the first level and output the first level when a potential of the second node is the first level.