P-Type Power Switch Driver Circuit for High-Side Buck Converters
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Solution Overview
Problem
Driving a p-type power switch in high-side applications is challenging due to the need for careful voltage management, as the maximum gate voltage of pMOS high-side power transistors is often less than the input voltage, leading to increased complexity, static power consumption, and reduced response time in buck converters.
Innovation Solution
A driver circuit utilizing a capacitor coupled to the control terminal of the p-type power switch, which applies a control voltage to reduce the control voltage to a target value, disconnecting from ground when reached, to safely switch the power switch on, without requiring a high-side ground and minimizing static power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a buffer and feedback loop are used to drive the gate of the high-side pMOS transistor, then the control voltage can be managed safely, but the complexity of the system increases, static power consumption increases, and response time is reduced
Solution Approach 1:
The patent extracts and eliminates the buffer and feedback loop components from the gate driver circuit. Instead of using a complex buffered approach with feedback regulation, the invention directly connects the gate driver output to the pMOS gate through a simplified switching mechanism, removing unnecessary components while maintaining safe voltage control through the intrinsic properties of the pMOS transistor and capacitor discharge path.
Solution Approach 2:
The gate driver circuit utilizes the inherent capacitance of the pMOS gate and the natural discharge path through the low-side switch to self-regulate the gate voltage. The capacitor formed by the gate-drain and gate-source capacitances automatically discharges when the low-side switch turns on, providing inherent voltage control without requiring external feedback loops or active regulation circuits.
2Reliability
If a buffer and feedback loop are used to drive the gate of the high-side pMOS transistor, then the control voltage can be managed safely, but static power consumption increases
Solution Approach 1:
The patent removes the buffer stage and feedback loop components that would continuously consume static power. The simplified circuit uses passive switching elements that only consume power during transient switching events, eliminating the continuous power draw associated with active feedback regulation and buffering stages.
Solution Approach 2:
The gate driver operates in a periodic switching manner rather than continuous regulation. The high-side switch is turned on by charging the gate capacitor through the driver, then remains on while the capacitor naturally discharges through the low-side switch during the off-period. This periodic charging-discharging cycle eliminates continuous power consumption while maintaining proper voltage control.
3Reliability
If a buffer and feedback loop are used to drive the gate of the high-side pMOS transistor, then the control voltage can be managed safely, but the response time of the converter is reduced
Solution Approach 1:
By removing the buffer stage and feedback loop, the patent eliminates the propagation delays and regulation time associated with these components. The direct switching connection allows the gate voltage to respond immediately to control signals, with the only delay being the inherent RC time constant of the gate capacitance and driving resistance, which is inherently faster than buffered feedback approaches.
Solution Approach 2:
The gate capacitor is pre-charged to the required voltage level before switching is needed. When the high-side switch needs to turn on, the capacitor is already charged and can immediately discharge through the low-side switch path, enabling fast turn-off response. The driver circuit maintains the capacitor in a ready state, eliminating the need for real-time feedback regulation during switching transitions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables fast switching of the p-type power switch while maintaining safe control voltages, reducing on-resistance and silicon area, and improving efficiency by eliminating the need for a high-side ground and minimizing static power consumption.
Implementation Method 1
a capacitor having a first terminal coupled to the control terminal of the power switch and a second terminal coupled to a voltage source
Data Source
AI summary
There is presented a driver and a corresponding method for driving a p-type power switch. The driver includes a capacitor coupled to a control terminal of the power switch. The driver is configured to apply a control voltage to the control terminal and to connect the control terminal to ground to reduce the control voltage down to a target value to switch the power switch on. When identifying that the control voltage has reached the target value, the driver disconnects the control terminal from ground. The driver may be used in various circuits including switching power converters, audio amplifiers and charge-pump circuits.