Data Plane Program Verification Using P4 to GCL Translation
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Solution Overview
Problem
Current network verification tools face challenges in integrating multiple tools to verify cross-layer properties and extending them with new functionality, particularly in handling stateful devices like load balancers or firewalls, and struggle to ensure end-to-end performance, reliability, and security properties in network behavior verification.
Innovation Solution
A method is provided to verify data plane programs by documenting assumptions about the control plane using annotations, translating programs from P4 to Guarded Command Language (GCL), introducing zombie state to capture control plane behaviors, and using satisfiability modulo theory (SMT) solvers to check weakest preconditions, which allows for efficient verification and optimization of data plane behaviors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple verification tools are integrated to verify cross-layer properties, then verification completeness is improved, but device complexity and integration difficulty increase
Solution Approach 1:
The patent merges multiple verification tools and functionalities into a single unified verification framework that can handle cross-layer properties, stateful devices, and various verification tasks simultaneously, eliminating the need to integrate multiple separate tools
Solution Approach 2:
The verification framework is designed to be universal and multi-functional, capable of verifying data plane programs, control plane programs, cross-layer properties, and handling stateful devices like load balancers and firewalls within a single system
2Reliability
If verification covers comprehensive network properties including end-to-end performance and security, then verification thoroughness is improved, but verification time and computational resources increase
Solution Approach 1:
The verification process is segmented into distinct phases including data plane verification, control plane verification, and cross-layer property verification, allowing each aspect to be verified systematically without overwhelming computational burden
Solution Approach 2:
The system performs preliminary analysis and generates verification conditions before executing full verification, and uses caching mechanisms to store intermediate results, reducing redundant computations and verification time
3Adaptability or versatility
If new functionality is extended to verification tools, then verification capability is improved, but tool complexity and difficulty of extension increase
Solution Approach 1:
The verification framework is designed with universal interfaces and standardized mechanisms that allow new functionality to be extended without increasing overall system complexity, supporting verification of various network devices and protocols through a common architecture
Data Source
AI summary
A method for verifying data plane programs is provided in some embodiments. Because the behavior of a data plane program (e.g., a program written in the P4 language) is determined in part by the control plane populating match-action tables with specific forwarding rules, in some embodiments, programmers are provided with a way to document assumptions about the control plane using annotations (e.g., in the form of “assertions” or “assumptions” about the state based on the unknown control plane contribution). In some embodiments, annotations are added automatically to verify common properties, including checking that every header read or written is valid, that every expression has a well-defined value, and that all standard metadata is manipulated correctly. The method in some embodiments translates programs from a first language (e.g., P4) to a second language (e.g., Guarded Command Language (GCL)) for verification by a satisfiability modulo theory (SMT) solver.