Power Amplifier Bias Circuit for Stable Current Mirror Ratios

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Solution Overview

Problem

Achieving linear gain and phase characteristics while maintaining output power and efficiency is a key challenge in power amplifier design, with existing methods leading to inconsistent current mirror ratios and process variations.

Innovation Solution

Implementing a power amplifier with multiple bias impedance states and a coupling circuitry that preserves the current mirror ratio across different power modes, using transistors and diodes to adjust bias impedance based on power levels, and incorporating linearization capacitors to optimize AM/AM characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a power amplifier is designed to achieve linear gain and phase characteristics, then linearity is improved, but output power and efficiency may deteriorate

Engineering Contradiction:
ImprovelinearityVSAvoidoutput power
Core Design Contradiction:
Manufacturing precisionVSPower

Solution Approach 1:

The bias circuit dynamically adjusts the operating point of the power amplifier transistor across different power modes. By varying the bias voltage and current based on the operating mode, the circuit maintains optimal linearity at each power level rather than being fixed, thus resolving the contradiction between linearity and output power capability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes key bias parameters (voltage and current) depending on the power mode of operation. Different bias settings are applied for different output power levels, allowing the amplifier to achieve both high linearity when needed and high output power when required, thus resolving the contradiction between these two parameters

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If existing bias circuits are used, then device complexity is reduced, but current mirror ratio consistency deteriorates

Engineering Contradiction:
Improvecircuit complexityVSAvoidcurrent mirror ratio consistency
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The bias circuit is segmented into multiple independent bias circuits, each dedicated to a specific power mode. This segmentation allows each sub-circuit to be optimized for its specific operating condition, ensuring consistent current mirror ratios within each mode while keeping individual circuit sections relatively simple

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The bias circuit is designed with multi-functionality to serve different power modes through a unified structure. The circuit can operate in multiple configurations depending on the selected power mode, providing consistent current mirror ratios across all modes without requiring completely separate circuits for each mode

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Manufacturing precision

If bias resistors are mirrored to preserve current mirror ratio, then current mirror ratio consistency is improved, but device complexity increases

Engineering Contradiction:
Improvecurrent mirror ratio consistencyVSAvoidcircuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The bias resistor mirroring is applied selectively and asymmetrically - full mirroring is used in power modes where consistent current mirror ratios are critical, while simplified biasing is used in modes where such precision is less critical. This asymmetric application of mirroring maintains current consistency where needed without unnecessarily complicating the circuit everywhere

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS12506450B2Power amplifier bias circuit
Publication Date: 2025.12.23 SKYWORKS SOLUTIONS INC
  • US12506450B2 patent drawing
  • US12506450B2 patent drawing
  • US12506450B2 patent drawing

AI summary

A power amplifier comprises a first transistor, a second transistor, a first emitter follower, a first bias resistor, and coupling circuitry configured to couple the first bias resistor to a base of the first transistor, the first bias resistor, the second bias resistor, and an emitter of the first emitter follower at a first node, and a base of the first emitter follower to the second transistor.