PA Linearizer With Complementary MOS Compensation for Wider Linearity

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Solution Overview

Problem

Power amplifiers in mobile communication systems face challenges in achieving wide linearized power range due to nonlinear capacitance variations, particularly in Class-AB amplifiers, which restrict performance and introduce distortion.

Innovation Solution

The use of complementary cross-coupled PMOS and NMOS transistor pairs, along with a transformer in specific configurations, to compensate capacitance variations and improve linearity, ensuring constant overall capacitance and reducing AM-AM and AM-PM distortions across a wider power range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a power amplifier is biased at lower bias condition (Class-AB or Class-B) to achieve high efficiency and high power, then power efficiency is improved, but nonlinear capacitance variation increases causing distortion

Engineering Contradiction:
Improvepower efficiencyVSAvoidnonlinear capacitance variation
Core Design Contradiction:
Use of energy by moving objectVSObject-generated harmful factors

Solution Approach 1:

The patent converts the harmful nonlinear capacitance variation of the NMOS transistor into a beneficial effect by introducing a PMOS transistor whose capacitance variation is complementary. The PMOS transistor's capacitance decreases when NMOS capacitance increases, and vice versa, thereby canceling out the nonlinear effects and achieving linearization while maintaining high efficiency operation

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent creates a composite transistor structure by combining NMOS and PMOS transistors in a cross-coupled configuration. This composite structure leverages the complementary characteristics of the two transistor types to achieve both high efficiency and linearity, resolving the contradiction between efficiency and nonlinear distortion

Inventive Principle:
Principle #40Composite materials

2Reliability

If a single PMOS transistor is used to compensate Cgs variation of NMOS, then linearity is improved, but linearized power range remains limited

Engineering Contradiction:
ImprovelinearityVSAvoidlinearized power range
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent segments the compensation function by using multiple PMOS transistors (MP1 and MP2) instead of a single PMOS transistor. Each PMOS transistor is configured to compensate for capacitance variations in specific operating regions, thereby extending the overall linearized power range while maintaining linearity across the full power spectrum

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges multiple PMOS transistors in a cross-coupled configuration where MP1 and MP2 work together to provide comprehensive capacitance compensation. This combining approach allows the system to achieve extended linearized power range by leveraging the complementary strengths of each transistor in different operating conditions

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If cross-coupled PMOS and NMOS transistor pairs are used to extend linearized power range, then linearity is improved across wider power range, but device complexity increases

Engineering Contradiction:
Improvelinearized power rangeVSAvoidtransistor configuration
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent designs the cross-coupled PMOS and NMOS transistor pairs to serve multiple functions simultaneously: they provide capacitance compensation, extend linearized power range, and maintain efficiency. This multi-functionality reduces the need for additional separate components, thereby managing device complexity while achieving extended linearized power range

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12191817B2Peripheral for amplifier linearization with complimentary compensation
Publication Date: 2025.01.07 KYOCERA INTERNATIONAL INC
  • US12191817B2 patent drawing
  • US12191817B2 patent drawing
  • US12191817B2 patent drawing

AI summary

A power amplifier (PA) linearization technique with a wider linearized power range is proposed. Proposed two types of linearizers with cross-coupled PMOS and NMOS configuration. The idea is to use a complimentary device compared with the PA core device, and the behavior of Cgs of the linearizer are also complimentary to the PA itself. In the other words, the overall Cgs of the PA with the linearizer would be constant without leading to non-linear waveform. Both linearizers can effectively compensate not only AMAM but also AMPM. First type of linearizer can be integrated with PA cores, and second type of linearizer can be used in the IMN. Both linearizers have effective IM3 reduction in different corner.