Power Amplifier DC Voltage Tuning for Clock Pulling Mitigation
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Solution Overview
Problem
Conventional digitally-controlled power amplifiers (DPAs) face inefficiencies due to inductor-loaded switching-mode amplifiers, leading to increased voltage swing, degraded battery efficiency, and out-of-band noise/replica issues, while also suffering from transmitter performance degradation due to feedback paths.
Innovation Solution
A multi-stage DPA design with a DC voltage tuning circuit that adjusts the DC voltage supplied to the power amplifier to mitigate clock source pulling, eliminating the need for inductor-loaded class-D/E amplifiers and incorporating a digitally-controlled charging technique to reduce out-of-band noise/replica.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If inductor-loaded switching-mode amplifiers are used, then high efficiency is achieved, but voltage swing becomes greater than π×VDD requiring lower supply voltage and DC-DC conversion
Solution Approach 1:
The patent changes the fundamental operating parameters of the power amplifier by transitioning from inductor-loaded switching-mode operation to resistive-loaded class-AB operation. This parameter change allows the amplifier to operate directly from battery voltage without requiring DC-DC conversion, thereby improving battery efficiency while maintaining acceptable amplifier efficiency through proper biasing and load impedance selection.
Solution Approach 2:
The patent extracts and removes the inductor-loaded switching-mode amplifier architecture from the system. By eliminating the inductor and DC-DC converter components, the design directly connects the battery to the amplifier, removing the energy conversion stage that was degrading battery efficiency and simplifying the overall power delivery architecture.
2Stress or pressure
If DC-DC converter and LDO regulator are used to convert high DC voltage to low supply voltage, then voltage swing is reduced, but battery efficiency is degraded
Solution Approach 1:
The patent removes the DC-DC converter and LDO regulator from the power delivery path. By eliminating these intermediate voltage conversion stages, the amplifier operates directly from the battery voltage, eliminating the energy losses associated with voltage conversion while managing voltage swing through alternative circuit design approaches.
Solution Approach 2:
The patent changes the operating voltage parameter from a converted low voltage to direct battery voltage operation. This parameter change eliminates the need for voltage conversion components and their associated energy losses, improving overall battery efficiency while maintaining proper amplifier operation through appropriate biasing schemes.
3Ease of operation
If periodic sampling clock is used for AM sampling, then modulation is achieved, but out-of-band noise and replica are introduced
Solution Approach 1:
The patent employs periodic sampling action through a sampling clock to achieve amplitude modulation of the RF signal. The periodic nature of the sampling clock enables the modulation function while the circuit design manages the spectral consequences through proper filtering and signal processing techniques.
4Object-generated harmful factors
If higher sampling rate is used to reduce out-of-band noise, then noise is reduced, but power consumption increases
Solution Approach 1:
The patent optimizes the sampling clock frequency parameter to achieve an optimal balance between noise reduction and power consumption. By carefully selecting the sampling rate, the design reduces out-of-band noise effectively while avoiding the excessive power consumption that would result from using a much higher sampling rate.
5Power
If feedback path is established by magnetic coupling or direct coupling, then signal transmission is achieved, but transmitter performance is degraded due to clock source pulling
Solution Approach 1:
The patent removes or isolates the feedback path that was causing clock source pulling through magnetic or direct coupling. By eliminating this harmful coupling path, the design maintains signal transmission capability while preventing the degradation of transmitter performance associated with clock frequency instability.
Solution Approach 2:
The patent introduces isolation or buffering elements as intermediaries between the output stage and the clock source. These intermediary components prevent direct coupling and magnetic coupling from affecting the clock source, thereby eliminating pulling while maintaining the necessary feedback or signal transmission functions.
Data Source
AI summary
A transmitter includes a power amplifier (PA) and a direct current (DC) voltage tuning circuit. The PA is arranged for receiving a radio-frequency (RF) clock derived from a clock source, and producing an output signal according to at least the RF clock. The DC voltage tuning circuit is arranged for tuning at least one DC voltage supplied to the PA for pulling mitigation of the clock source. A method of pulling mitigation of a source clock by a power amplifier (PA) includes adjusting a direct current (DC) voltage supplied to the PA.