Semiconductor Package Adhesive Layout for Warpage Control
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Solution Overview
Problem
New packaging technologies for semiconductor dies face manufacturing challenges as they strive to achieve higher integration density and functionality while maintaining reliability and performance.
Innovation Solution
A package structure is developed with a redistribution structure over a carrier substrate, featuring conductive bumps and features, an interposer substrate, and a protective layer, utilizing conductive and adhesive elements to enhance adhesion and reduce warpage, thereby improving reliability and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If new packaging technologies are used to achieve higher integration density and functionality, then productivity and functional density are improved, but manufacturing challenges and reliability issues arise
Solution Approach 1:
The packaging structure is divided into multiple functional layers including interposer substrate, adhesive layer, semiconductor die, and encapsulant, allowing each layer to be optimized independently for both high integration density and manufacturing reliability
Solution Approach 2:
The patent uses composite material structures combining different substrates, adhesives, and encapsulants to achieve the required integration density while maintaining manufacturing reliability through material compatibility and controlled bonding
2Area of stationary object
If package size is reduced to utilize less area, then productivity and density are improved, but manufacturing precision and reliability become more difficult to maintain
Solution Approach 1:
The patent transitions from planar packaging to three-dimensional stacked architecture with vertical interconnections, reducing the footprint area while maintaining manufacturing precision through standardized vertical bonding processes
Solution Approach 2:
Multiple functional components are nested vertically within a compact structure, with the semiconductor die positioned on the interposer substrate and encapsulant surrounding the assembly, achieving high density without compromising manufacturing precision
3Reliability
If adhesive elements are added to enhance adhesion, then reliability is improved, but device complexity increases
Solution Approach 1:
An adhesive layer is introduced as an intermediary between the interposer substrate and semiconductor die to enhance bonding reliability, while the standardized application process keeps the added complexity manageable
4Reliability
If conductive elements are used to maintain consistent distances, then reliability is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent controls the thickness and positioning parameters of adhesive and encapsulant layers to maintain consistent distances between components, achieving structural stability through parameter control rather than complex conductive feature designs
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure maintains consistent distances and reduces warpage, preventing void formation and enhancing the reliability and performance of the semiconductor package.
Implementation Method 1
an adhesive element between the interposer substrate and the semiconductor chip
Data Source
AI summary
A package structure is provided. The package structure includes a semiconductor chip over a substrate and an adhesive element between the semiconductor chip and the substrate. The substrate is wider than the adhesive element. The package structure also includes a protective layer laterally surrounding the semiconductor chip and the adhesive element and multiple thermal conductive elements between the substrate and the semiconductor chip. The thermal conductive elements are surrounded by the adhesive element.