Semiconductor Package Alignment Marks for Thick-Wafer Photolithography
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The thickness of semiconductor substrates affects alignment accuracy in photolithography processes, limiting integration density and bandwidth due to decreased e-beam intensity, which constrains the thickness of wafers and packages.
Innovation Solution
Forming alignment marks in the peripheral portion of one wafer not covered by a substrate allows for high alignment accuracy during photolithography, enabling thicker substrates and packages without constraining thickness, and allowing for higher integration density and bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If alignment marks are formed in the central portion of a wafer covered by substrate, then alignment accuracy can be maintained, but e-beam intensity decreases due to substrate thickness, limiting integration density and bandwidth
Solution Approach 1:
The wafer is divided into a central portion (for substrate placement) and a peripheral portion (for alignment marks). This segmentation allows the alignment marks to be positioned where they do not interfere with substrate coverage, eliminating the trade-off between alignment accuracy and e-beam intensity.
Solution Approach 2:
The alignment marks are moved from the two-dimensional central area to the peripheral region of the wafer, utilizing the outer boundary area that would otherwise be unused. This spatial repositioning resolves the conflict by placing alignment functionality in a dimensionally distinct location.
2Quantity of substance
If wafer thickness is increased to allow for more components and higher integration density, then bandwidth and integration density improve, but alignment accuracy decreases due to reduced e-beam intensity through thicker substrates
Solution Approach 1:
By separating the substrate coverage area from the alignment mark location, the system allows independent optimization of substrate thickness for integration density while maintaining alignment marks in a region where e-beam intensity is sufficient for accurate alignment.
3Manufacturing precision
If alignment marks are placed in the central portion of the wafer, then photolithography alignment can be performed, but substrate thickness must be constrained to maintain e-beam intensity, limiting package thickness
Solution Approach 1:
The alignment marks are positioned in the peripheral region rather than the central area, utilizing the radial dimension of the wafer. This allows photolithography alignment to be performed with full e-beam intensity while substrates of any thickness can be placed in the central portion without compromising alignment capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves high alignment accuracy and increased integration density, enabling more components per wafer with reduced power consumption and simplified manufacturing processes.
Implementation Method 1
when performing photolithography processes on one of the wafers of the semiconductor package, the alignment mark used in photolithography processes is formed in the peripheral portion of another wafer, which is not covered with any substrate. Therefore, high alignment accuracy can be achieved. In addition, the thickness of the substrate, the thickness of the wafer, and the overall thickness of the semiconductor package are no longer constrained.
Data Source
AI summary
A method for forming a semiconductor package is provided. The method includes forming a first alignment mark in a first substrate of a first wafer and forming a first bonding structure over the first substrate. The method also includes forming a second bonding structure over a second substrate of a second wafer and trimming the second substrate, so that a first width of the first substrate is greater than a second width of the second substrate. The method further includes attaching the second wafer to the first wafer via the first bonding structure and the second bonding structure, thinning the second wafer until a through-substrate via in the second substrate is exposed, and performing a photolithography process on the second wafer using the first alignment mark.