Semiconductor Package Patch Antenna Isolation via Dielectric Thickness

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Solution Overview

Problem

The integration of antennas and semiconductor chips in a single package leads to reduced efficiency of the patch antenna due to interference caused by the semiconductor chip, necessitating a solution to improve antenna efficiency and reduce interference.

Innovation Solution

A dielectric feature, such as a die attach film, is disposed between the semiconductor chip and the patch antenna to enhance isolation and improve antenna efficiency, with the thickness of the dielectric feature selected based on operating bandwidth, k-value, and desired efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the antenna and semiconductor chip are integrated in a single package, then the component density and integration level are improved, but the antenna efficiency deteriorates due to interference from the semiconductor chip

Engineering Contradiction:

Improvecomponent densityVSAvoidantenna efficiency

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

A dielectric feature is introduced as an intermediary element positioned between the semiconductor chip and the patch antenna. This dielectric feature serves as a mediator that reduces parasitic capacitance and electromagnetic interference from the chip to the antenna, thereby improving antenna efficiency while maintaining the integrated package structure. The dielectric material with appropriate permittivity characteristics acts as a buffer zone that isolates the antenna from harmful electromagnetic fields generated by the chip.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Area of stationary object

If the semiconductor chip is placed close to the patch antenna, then the package footprint is reduced, but the antenna efficiency deteriorates due to increased interference

Engineering Contradiction:

Improvepackage footprintVSAvoidantenna efficiency

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

The dielectric feature acts as a space-efficient intermediary that enables close proximity placement of the chip and antenna while maintaining electrical isolation. By using a thin dielectric layer with optimized thickness and permittivity, the design achieves both compact footprint and reduced interference, as the dielectric material provides effective electromagnetic shielding in a minimal space.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The parasitic capacitance between the chip and antenna is modified by changing the dielectric parameters of the feature positioned between them. By selecting dielectric materials with specific permittivity values and optimizing the thickness of the dielectric layer, the parasitic capacitance is reduced to acceptable levels, thereby improving antenna efficiency without increasing the package footprint.

Inventive Principle:

Principle #35Parameter changes

3Ease of manufacture

If no dielectric feature is used between the chip and antenna, then the manufacturing process is simplified, but the antenna efficiency deteriorates due to parasitic capacitance

Engineering Contradiction:

Improvemanufacturing simplicityVSAvoidantenna efficiency

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The dielectric feature is integrated into the existing manufacturing process as an additional layer that can be deposited using standard semiconductor fabrication techniques. While it adds one more process step, the dielectric feature can be formed using conventional deposition and patterning methods, making the additional complexity minimal compared to the significant improvement in antenna efficiency it provides.

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The implementation of a dielectric feature between the semiconductor chip and the patch antenna significantly improves the efficiency of the patch antenna, achieving efficiencies close to 90% by reducing parasitic capacitance and interference.

Implementation Method 1

Methodology Applied

Scientific EffectParasitic capacitance: Parasitic Capacitance

Implementation Method 2

Methodology Applied

Scientific EffectDielectric: Dielectric

Data Source

PatentUS12266619B2Integrated devices in semiconductor packages and methods of forming same

Publication Date: 2025.04.01 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

An embodiment package comprises an integrated circuit die encapsulated in an encapsulant, a patch antenna over the integrated circuit die, and a dielectric feature disposed between the integrated circuit die and the patch antenna. The patch antenna overlaps the integrated circuit die in a top-down view. The thickness of the dielectric feature is in accordance with an operating bandwidth of the patch antenna.