Semiconductor Package Antenna Integration via Redistribution Structure
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in efficiently integrating and connecting semiconductor dies with conductive structures and antenna patterns, leading to signal loss and increased package thickness, which affects the performance and efficiency of electronic devices.
Innovation Solution
The proposed solution involves a manufacturing process that includes forming conductive posts and ground planes on semiconductor wafers, redistributing circuit patterns, and encapsulating dies with a redistribution structure that includes antenna patterns electrically coupled with ground planes, allowing for direct signal transmission and reduced thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional packaging technologies are used to integrate semiconductor dies with conductive structures and antenna patterns, then the integration is achieved, but signal loss increases and package thickness increases
Solution Approach 1:
The patent combines the antenna pattern formation with the semiconductor die manufacturing process by forming antenna patterns directly on the semiconductor wafer before singulation. This integration merges multiple functions (signal transmission and antenna operation) into a single structure, reducing the need for separate conductive structures and interconnection layers, thereby reducing package thickness and signal loss
Solution Approach 2:
The patent transitions from traditional three-dimensional stacked packaging to a planar two-dimensional integration approach by forming antenna patterns and conductive structures on the same plane as the semiconductor die. This dimensional change reduces vertical thickness while maintaining electrical connectivity and signal transmission efficiency
2Reliability
If conventional packaging technologies are used to integrate semiconductor dies with conductive structures and antenna patterns, then the integration is achieved, but antenna efficiency decreases
Solution Approach 1:
The patent merges the antenna function with the semiconductor die structure by forming antenna patterns directly on the wafer. This consolidation eliminates the need for separate antenna components and complex interconnection structures, improving antenna efficiency while the standardized manufacturing process keeps integration complexity manageable
Solution Approach 2:
The semiconductor wafer structure serves multiple functions simultaneously: it acts as both the semiconductor device substrate and the antenna support structure. The conductive layers formed on the wafer serve dual purposes as both interconnection structures and antenna elements, reducing overall device complexity while improving antenna performance
Data Source
AI summary
A package structure includes a die, an encapsulant, and a first redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The die includes a ground plane within the die. The encapsulant encapsulates the die. The first redistribution structure is over the active surface of the die. The first redistribution structure includes an antenna pattern electrically coupled with the ground plane. The antenna pattern is electrically connected to the die.