Wafer-Level Package Antenna via TIV Ground Plane
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in achieving compact layout, high thermal dissipation, and reliable antenna performance due to the need for additional semiconductor elements between antenna elements and ground planes, which affects layout area and efficiency.
Innovation Solution
A wafer-level packaging method involving a through interlayer via (TIV) connected to an antenna element, a redistribution layer acting as a ground plane, and a molding compound, where the TIV's height is adjustable to control distance and allow fine pitch design, ensuring efficient antenna performance and thermal dissipation without additional semiconductor elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional semiconductor elements are placed between antenna element and ground plane, then antenna performance is improved, but layout area increases and device complexity increases
Solution Approach 1:
The patent extracts and eliminates the additional semiconductor elements from the antenna assembly, directly connecting the antenna element to the ground plane through the TIV structure. This removal of unnecessary components reduces layout area while maintaining antenna performance through the optimized TIV design that provides both electrical connection and mechanical support.
Solution Approach 2:
The TIV structure serves multiple functions simultaneously: it acts as an electrical connection path between the antenna element and ground plane, provides mechanical support for the antenna element, and enables fine pitch design for compact layouts. This multi-functionality eliminates the need for separate additional semiconductor elements, reducing both layout area and device complexity.
2Reliability
If additional semiconductor elements are placed between antenna element and ground plane, then antenna performance is improved, but device complexity increases
Solution Approach 1:
The patent removes additional semiconductor elements from the antenna assembly, simplifying the device structure. The TIV design provides all necessary functions (electrical connection, mechanical support, and positioning) without requiring extra semiconductor components, thereby reducing device complexity while maintaining antenna performance.
Solution Approach 2:
The TIV structure is designed to perform multiple functions that previously required separate components: electrical connectivity, mechanical support, and precise positioning for fine pitch designs. This consolidation into a single multi-functional element reduces device complexity while ensuring reliable antenna performance.
3Reliability
If TIV height is increased to control distance, then antenna performance is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent utilizes parameter changes in the TIV structure, specifically adjusting the TIV height as a controllable variable to optimize the distance between the antenna element and ground plane. By making the TIV height adjustable and standardized, the design achieves flexible antenna performance tuning while maintaining manageable manufacturing precision through established fabrication processes.
Data Source
AI summary
A package structure include a ground plate, a semiconductor die, a molding compound, and an antenna element. The semiconductor die is located over the ground plate. The molding compound is located over the semiconductor die. The antenna element is located in the molding compound and overlaps with the ground plate along a stacking direction of the ground plate, the semiconductor die and the molding compound. The antenna element has a first side levelled with a first surface of the molding compound, and the ground plate is located between the semiconductor die and the antenna element.