IC Package Heat Dissipation on Backside and Sidewalls
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Solution Overview
Problem
The challenge in the semiconductor industry is to effectively package semiconductor dies with improved heat dissipation structures that accommodate shrinking device sizes and increased integration density, while maintaining manufacturing efficiency and yield.
Innovation Solution
The formation of heat dissipation structures around the package components after singulation, which allows for larger surface area heat dissipation by being formed on the back-side surfaces and sidewalls, thereby improving thermal management in integrated circuit packages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If heat dissipation structures are formed before singulation, then manufacturing process is simpler, but heat dissipation surface area is reduced and shorting risk increases
Solution Approach 1:
The patent divides the manufacturing process into two stages: first forming heat dissipation structures on the wafer-level package component before singulation, then completing the structures after singulation. This segmentation allows the process to benefit from both wafer-level efficiency and individual component optimization, resolving the contradiction between manufacturing simplicity and heat dissipation effectiveness.
Solution Approach 2:
The patent performs preliminary formation of heat dissipation structures on the wafer before singulation, establishing a foundation that can be completed individually after cutting. This preliminary action enables efficient batch processing while allowing subsequent customization for each component, balancing manufacturing efficiency with optimal thermal performance.
2Temperature
If heat dissipation structures are formed after singulation, then heat dissipation surface area increases, but manufacturing complexity increases
Solution Approach 1:
The manufacturing process is segmented into wafer-level preliminary formation and individual component completion. This allows the complex steps to be performed on smaller, more manageable individual components after singulation, reducing the complexity burden while maintaining heat dissipation effectiveness.
Solution Approach 2:
Complex manufacturing steps are performed as preliminary actions on the wafer level where tooling and handling are simpler, then completed individually after singulation. This approach distributes complexity across different stages, making the overall process more manageable while achieving superior heat dissipation.
3Productivity
If device size is reduced for higher integration density, then more components fit in given area, but heat dissipation becomes more challenging
Solution Approach 1:
The patent extends heat dissipation structures onto the sidewalls of package components, adding a vertical dimension to the heat dissipation surface. This dimensional expansion provides additional thermal management area without increasing the horizontal footprint, enabling effective heat dissipation in densely integrated devices.
Solution Approach 2:
The patent applies heat dissipation structures selectively to specific regions of the package component, including sidewalls and back surfaces, concentrating thermal management resources where heat generation is highest. This localized approach optimizes thermal performance without adding overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances heat dissipation capabilities and reduces manufacturing costs by allowing simultaneous processing of more components, while avoiding shorting and increasing yield, thus addressing the need for efficient thermal management in densely packed semiconductor devices.
Implementation Method 1
a heat dissipation layer on the back-side of the package component and on sidewalls of the package component
Implementation Method 2
depositing a heat dissipation layer on the support structure, on a back-side of the package component, and on sidewalls of the package component
Data Source
AI summary
In an embodiment, a device includes: a package component including an integrated circuit die and conductive connectors connected to the integrated circuit die, the conductive connectors disposed at a front-side of the package component, the integrated circuit die exposed at a back-side of the package component; a heat dissipation layer on the back-side of the package component and on sidewalls of the package component; an adhesive layer on a back-side of the heat dissipation layer, a portion of a sidewall of the heat dissipation layer being free from the adhesive layer; and a package substrate connected to the conductive connectors.