Package Board Internal Terminal Interconnection for Power Delivery

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Solution Overview

Problem

Highly integrated semiconductor devices face limitations in stably supplying internal power voltage due to reduced chip level internal interconnection pitch, which affects power delivery efficiency and signal delivery efficiency between internal circuits.

Innovation Solution

A package board with a board body having first and second power, ground, and signal pads on its surfaces, with internal terminal interconnections that connect these pads through holes or in a bulk region, enhancing current carrying capacity and reducing electrical resistance, thereby improving power and signal delivery efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If chip level internal interconnections are used to connect high voltage generator to high voltage circuits, then the semiconductor device can be highly integrated, but the pitch reduction limits stable supply of internal power voltage

Engineering Contradiction:
Improveintegration levelVSAvoidpower voltage supply stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces package board level interconnections as a second dimension of power delivery, complementing the chip level internal interconnections. The package board provides alternative power and signal paths from bonding pads to internal circuits, bypassing the limitations of reduced pitch chip level interconnections and enabling stable power supply in highly integrated devices.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If chip level internal interconnections have reduced pitch for high integration, then device integration increases, but power delivery efficiency decreases

Engineering Contradiction:
Improveintegration levelVSAvoidpower delivery efficiency
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The package board level interconnections provide an additional dimension for power delivery that is not constrained by chip level pitch limitations. This enables efficient power transport over longer distances without the resistance penalties of highly miniaturized chip level traces, thereby maintaining power delivery efficiency in highly integrated devices.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The package board acts as an intermediary structure between external bonding pads and internal circuits, providing dedicated power and signal delivery paths. This intermediary layer handles the bulk of power transport, allowing chip level interconnections to focus on fine-grained signal routing rather than carrying high currents over long distances.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If only chip level internal interconnections are used, then device structure remains simple, but signal delivery efficiency between internal circuits deteriorates

Engineering Contradiction:
Improveinterconnection structureVSAvoidsignal delivery efficiency
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The package board level interconnections create a second dimension for signal routing that operates independently from chip level signal paths. This enables high-speed signal transport between distant internal circuits without being constrained by the limited bandwidth and length of chip level traces, thereby improving overall signal delivery efficiency.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a robust and efficient connection between internal terminal pads, reducing electrical resistance and enhancing power and signal delivery efficiency, addressing the limitations of conventional internal interconnections in highly integrated semiconductor devices.

Implementation Method 1

An internal terminal interconnection is provided in a bulk region of the board body or on a surface of the board body. The internal terminal interconnection electrically connects the first internal terminal pad to the second internal terminal pad.

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUSRE46666E1Package board having internal terminal interconnection and semiconductor package employing the same
Publication Date: 2018.01.09 SAMSUNG ELECTRONICS CO LTD
  • USRE46666E1 patent drawing
  • USRE46666E1 patent drawing
  • USRE46666E1 patent drawing

AI summary

A package board is provided. The package board includes a board body having a front surface and a back surface. A first power pad, a first ground pad, a first signal pad, a first internal terminal pad and a second internal terminal pad are disposed on the front surface of the board body, and a second power pad, a second ground pad and a second signal pad are disposed on the back surface of the board body. The second power pad, the second ground pad and the second signal pad are electrically connected to the first power pad, the first ground pad and the first signal pad, respectively. An internal terminal interconnection is provided in a bulk region of the board body or on a surface of the board body. The internal terminal interconnection electrically connects the first internal terminal pad to the second internal terminal pad. A semiconductor package employing the package board is also provided.