Semiconductor Package Cap Layer Ratio for Anti-Bending Strength

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Solution Overview

Problem

The existing die packaging methods face challenges in achieving sufficient mechanical strength to withstand increasing bending stresses due to higher integration levels in semiconductor devices, leading to potential deformation and failure.

Innovation Solution

The proposed package structure includes a semiconductor device encapsulated by a cap layer and a packaging substrate with a specific thickness ratio, where the cap layer's thickness is optimized to enhance mechanical strength without increasing the overall package thickness, using a conductive ball for electrical interconnection and heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the thickness of external packaging material is increased to obtain greater packaging strength, then the package structure can withstand greater bending stress, but the overall package thickness increases

Engineering Contradiction:
Improvepackaging strengthVSAvoidpackage thickness
Core Design Contradiction:
StrengthVSLength of stationary object

Solution Approach 1:

The patent optimizes the thickness ratio parameter between the cap layer and packaging substrate to achieve maximum bending resistance. By setting the cap layer thickness to 10-20 μm and packaging substrate thickness to 50-100 μm, the structure achieves optimal mechanical strength without excessive overall thickness, directly resolving the contradiction between strength and thickness.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite structure combining cap layer (epoxy resin or polyimide), packaging substrate (ceramic or plastic), and semiconductor die. This multi-material composite approach provides superior mechanical strength and bending resistance compared to single-material solutions, enabling the package to withstand higher stresses while maintaining compact dimensions.

Inventive Principle:
Principle #40Composite materials

2Adaptability or versatility

If the integration level of semiconductor devices is increased to improve functionalities, then various functional devices are integrated in a die, but the bending stress on the package structure increases

Engineering Contradiction:
Improvefunctional integrationVSAvoidpackage mechanical strength
Core Design Contradiction:
Adaptability or versatilityVSStrength

Solution Approach 1:

The patent divides the package structure into distinct functional layers: cap layer, packaging substrate, and semiconductor die. This segmentation allows each layer to be optimized for its specific function while collectively providing enhanced mechanical strength to support high integration levels and withstand increased bending stresses.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary optimization of the cap layer and packaging substrate thickness ratio during the design stage to preemptively ensure sufficient mechanical strength. By pre-calculating and setting the optimal thickness parameters before manufacturing, the structure is prepared to handle the increased bending stresses that will result from high integration levels.

Inventive Principle:
Principle #10Preliminary action

3Strength

If the cap layer thickness is optimized to enhance mechanical strength, then the anti-bending capability is improved, but the manufacturing precision requirements increase

Engineering Contradiction:
Improveanti-bending capabilityVSAvoidthickness ratio control
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The patent establishes specific parameter ranges for cap layer thickness (10-20 μm) and packaging substrate thickness (50-100 μm), along with their thickness ratio. These defined parameters provide clear manufacturing targets and tolerances, making it easier to control production precision while achieving the desired anti-bending capability.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240404901A1Package structures, fabricating methods thereof, and memory systems
Publication Date: 2024.12.05 YANGTZE MEMORY TECH CO LTD
  • US20240404901A1 patent drawing
  • US20240404901A1 patent drawing
  • US20240404901A1 patent drawing

AI summary

Implementations of the present disclosure disclose a package structure, a fabricating method thereof, and a memory system. The package structure includes: a packaging substrate having a first surface and a second surface opposite the first surface; a semiconductor device on the first surface of the packaging substrate and coupled with the packaging substrate; and a cap layer covering the first surface and encapsulating the semiconductor device, wherein the cap layer and the packaging substrate have a total thickness in a first direction perpendicular to the first surface, and a ratio between a distance from an upper surface of the cap layer to an upper surface of the semiconductor device in the first direction and the total thickness satisfies a first preset value.