Package Carrier With Dual-Thickness Circuit Patterns

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Solution Overview

Problem

Current circuit carriers face manufacturing difficulties due to thick circuit layers greater than 70 μm, requiring precise line spacing control and struggling to meet diverse circuit requirements like signal traces and power/ground layers on the same plane.

Innovation Solution

A package carrier design featuring circuit patterns with two different thicknesses, where the second circuit patterns are directly connected to the first and separated by an insulating material layer, allowing for flexible circuit configurations and improved manufacturing feasibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the thickness of the circuit layer is increased to meet power/ground layer requirements, then the ability to provide power and ground functions is improved, but the manufacturing difficulty increases due to challenges in electroplating and etching processes

Engineering Contradiction:
Improvecircuit requirement satisfactionVSAvoidmanufacturing difficulty
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent divides the circuit layer into multiple sub-layers with different thicknesses. Power/ground layers are formed with greater thickness to satisfy electrical requirements, while signal trace layers maintain smaller thickness for manufacturing feasibility. This segmentation allows each layer to be optimized independently for its specific function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the circuit carrier have different layer thicknesses tailored to local requirements. Power and ground regions utilize thicker layers for electrical performance, while signal transmission regions use thinner layers that are easier to manufacture with standard electroplating and etching processes.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If the line spacing between circuits is reduced to meet compact design requirements, then the area utilization is improved, but the manufacturing precision requirement becomes much more challenging

Engineering Contradiction:
Improvearea utilizationVSAvoidline spacing control
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent segments the circuit patterns into different thickness categories. Thicker power/ground patterns can maintain larger spacing, while thinner signal patterns enable tighter spacing. This segmentation allows the design to achieve compact area utilization without uniformly reducing all line spacing to challenging levels.

Inventive Principle:
Principle #1Segmentation

3Reliability

If the circuit layer thickness is increased to provide better electrical performance, then the electrical functionality is improved, but the manufacturing process complexity increases

Engineering Contradiction:
Improveelectrical functionalityVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the circuit carrier into multiple functional layers with different thicknesses. Power and ground layers use greater thickness for electrical performance, while signal layers use thinner profiles. This segmentation allows electrical functionality to be optimized without requiring the entire structure to be manufactured at high complexity levels.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different local regions have different layer thicknesses optimized for their specific electrical functions. Power/ground regions have thicker layers for current carrying capacity, while signal regions have thinner layers for controlled impedance and manufacturability, reducing overall process complexity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10881006B2Package carrier and package structure
Publication Date: 2020.12.29 UNIMICRON TECH CORP
  • US10881006B2 patent drawing
  • US10881006B2 patent drawing
  • US10881006B2 patent drawing

AI summary

A package carrier includes a plurality of first circuit patterns, a plurality of second circuit patterns and an insulating material layer. The second circuit patterns are disposed between any two the first circuit patterns and are directly connected to the first circuit patterns. In a cross-sectional view, a first thickness of each of the first circuit patterns is greater than a second thickness of each of the second circuit patterns. A first surface of each of the first circuit patterns is aligned with a second surface of each of the second circuit patterns. The insulating material layer at least contacts the first circuit patterns.