Package Carrier Heat Dissipation via Embedded Core Channel

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Solution Overview

Problem

Existing package carriers face challenges in achieving compactness and light weight while effectively dissipating heat due to unfavorable heat conducting efficiency of core layers and inaccuracies in cavity formation during heat dissipating block placement, leading to increased thermal resistance and manufacturing complexities.

Innovation Solution

A manufacturing method for a package carrier that includes forming a heat conducting channel within the substrate, embedding a heat conducting element with a buffer layer, and filling the gap with insulation material, allowing for precise cavity formation without mechanical or laser processing, thereby enhancing heat dissipation and reducing overall thickness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If heat dissipating blocks are disposed on the lower surface of the package carrier, then heat dissipation is enhanced, but the overall thickness of the package carrier increases

Engineering Contradiction:
Improveheat dissipationVSAvoidoverall thickness
Core Design Contradiction:
TemperatureVSLength of stationary object

Solution Approach 1:

The heat dissipating block is embedded within the core layer, nesting the heat dissipation function inside the existing structure rather than adding it externally. This allows heat dissipation enhancement while maintaining compact thickness by utilizing the internal space of the core layer.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The invention transitions from surface-level heat dissipation (2D placement on lower surface) to internal volumetric heat dissipation (3D embedding within core layer). This dimensional change enables heat dissipation functionality without proportionally increasing the overall thickness.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If materials are removed by laser or mechanical processing to form cavity, then cavity can be formed to accommodate electronic device, but manufacturing precision and production efficiency are reduced

Engineering Contradiction:
Improvecavity depth and flatnessVSAvoidproduction efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The cavity is formed through mold design and injection molding process before the heat dissipating block is embedded. This preliminary formation of the cavity eliminates the need for subsequent laser or mechanical processing, thereby improving both manufacturing precision and production efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention replaces laser or mechanical processing methods with mold-based cavity formation. The mold cavity is created during the injection molding process, substituting complex post-processing mechanical operations with a more efficient molding approach that achieves better precision and higher productivity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Length of stationary object

If heat dissipating blocks are embedded in the core layer, then overall thickness is reduced, but manufacturing complexity increases due to precise cavity formation requirements

Engineering Contradiction:
Improveoverall thicknessVSAvoidmanufacturing process complexity
Core Design Contradiction:
Length of stationary objectVSDevice complexity

Solution Approach 1:

The cavity formation process is merged with the injection molding process of the core layer and heat dissipating block. By integrating cavity creation into the molding process itself, the manufacturing steps are combined, reducing overall process complexity while achieving the desired compact thickness.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The mold serves multiple functions: it forms the core layer structure, creates the cavity for the electronic device, and shapes the heat dissipating block simultaneously. This multi-functionality of the mold simplifies the manufacturing process by eliminating the need for separate cavity formation operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method ensures precise processing, improves production efficiency, reduces costs, and achieves favorable heat dissipation by embedding the heat conducting element within the core layer, allowing for direct contact with the electronic device and rapid heat dissipation through patterned circuit layers.

Implementation Method 1

the heat generated by the electronic device may be transmitted to the heat dissipating block through the patterned circuit layers and the core layer

Methodology Applied
Scientific EffectHeat conduction: Conduction (thermal)

Data Source

PatentUS10177067B2Manufacturing method of package carrier
Publication Date: 2019.01.08 SUBTRON TECH
  • US10177067B2 patent drawing
  • US10177067B2 patent drawing
  • US10177067B2 patent drawing

AI summary

A manufacturing method including following steps is provided. A substrate that includes a core layer, a first conductive layer, and a second conductive layer is provided. A heat conducting channel is formed in the substrate, and an adhesion layer is formed on the second conductive layer to cover a side of the heat conducting channel. A heat conducting element and a buffer layer are placed into the heat conducting channel, and a gap is formed between either the heat conducting element or the buffer layer and an inner side surface of the heat conducting channel. The gap is filled with a first insulant material, and the adhesion layer and the buffer layer are removed to form a cavity and expose the heat conducting element. The first conductive layer and the second conductive layer are patterned to form a first patterned circuit layer and a second patterned circuit layer, respectively.