Semiconductor Package Cavity Layout With Partial Lid Encapsulation

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Solution Overview

Problem

Conventional semiconductor packages face issues of excess cost, decreased reliability, and large package sizes, leading to suboptimal performance.

Innovation Solution

The proposed solution involves a semiconductor device design with a substrate, conductive structure, and encapsulant configuration, where the electronic component is disposed within a substrate cavity and coupled to a conductive structure, with a lid covering part of the component while leaving another portion exposed, and an encapsulant covering the component's lateral side but not its first side, to enhance protection and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional semiconductor packages are used, then manufacturing is simpler, but cost increases and reliability decreases

Engineering Contradiction:
Improvepackage reliabilityVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The package structure is segmented into distinct functional regions: a substrate cavity for housing components, an encapsulant covering lateral sides for protection, and a lid covering the first side for sealing. This segmentation allows each part to be optimized independently, improving reliability while maintaining manufacturing feasibility through modular assembly.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The electronic component is nested within the substrate cavity, which is itself nested within the larger package structure. The encapsulant and lid further nest to create a hierarchical protective structure. This nesting approach maximizes space utilization, reducing package size while improving protection and reliability.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Volume of moving object

If conventional semiconductor packages are used, then manufacturing processes are traditional, but package size becomes too large

Engineering Contradiction:
Improvepackage sizeVSAvoidmanufacturing ease
Core Design Contradiction:
Volume of moving objectVSEase of manufacture

Solution Approach 1:

The package design transitions from a traditional planar layout to a three-dimensional structure with a substrate cavity. Components are positioned vertically within the cavity, utilizing the Z-dimension for space optimization. This dimensional change significantly reduces the footprint and overall package size while maintaining ease of manufacture through standardized cavity formation techniques.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The encapsulant is implemented as a thin film material that conformally covers the lateral sides of the electronic component. This thin-film approach provides adequate protection while minimizing the volume occupied by the encapsulation material, thereby reducing overall package size without compromising manufacturing ease.

Inventive Principle:
Principle #30Flexible shells and thin films

3Reliability

If conventional semiconductor packages are used, then protection is standard, but performance decreases

Engineering Contradiction:
Improvedevice performanceVSAvoidmaterial usage
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The package structure applies different levels of protection to different regions: the encapsulant covers lateral sides requiring environmental protection, while the lid covers the first side for sealing. This local quality approach ensures each area receives appropriate protection based on its specific requirements, optimizing performance while minimizing material usage by avoiding over-protection in all areas.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20240112975A1Electronic devices and methods of manufacturing electronic devices
Publication Date: 2024.04.04 AMKOR TECH SINGAPORE HLDG PTE LTD
  • US20240112975A1 patent drawing
  • US20240112975A1 patent drawing
  • US20240112975A1 patent drawing

AI summary

In one example, an electronic device includes a substrate including a substrate first side, a conductive structure, and a substrate sidewall on the substrate first side. The substrate sidewall forms a perimeter, the substrate first side within the perimeter defines a substrate base, and the substrate sidewall and the substrate base form a substrate cavity. An electronic component includes a component first side, a component second side, and a component lateral side. The electronic component is disposed over a first portion of the substrate base within the substrate cavity and is coupled to the conductive structure. An encapsulant encapsulates at least a portion of the component lateral side, and a lid is over at least a portion of the component first side. At least a portion of the component first side is devoid of the encapsulant. Other examples and related methods are also disclosed herein.