Package Connector Mounted on Integrated Heat Spreader

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Solution Overview

Problem

Conventional interconnect designs face signal integrity limitations beyond 40 GHz due to resistance and capacitance parasitic effects, hindering the scaling of high-speed IO interfaces, and existing solutions for package miniaturization and connector density scaling are inadequate.

Innovation Solution

A semiconductor package with a package connector mounted on an integrated heat spreader, which reduces electrical losses and eliminates the need for additional components like retention mounting clips and alignment holes, allowing for improved signal integrity and miniaturization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional interconnect designs (through package and PCB interconnects) are used, then package functionality is achieved, but signal integrity deteriorates beyond 40 GHz due to RC parasitic effects

Engineering Contradiction:
Improvesignal integrityVSAvoidelectrical losses
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent extracts the connector from the conventional package substrate location and relocates it to the motherboard, removing the source of RC parasitic effects from the high-speed signal path. This extraction eliminates the deteriorating influence on signal integrity while maintaining electrical connection functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention changes the spatial dimension of the connector location from within the package (2D plane on package substrate) to outside the package (mounted on motherboard). This dimensional shift repositions the connector in a new spatial context that eliminates parasitic degradation of high-speed signals.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If existing on-package connector solutions are implemented, then connector interconnection is achieved, but package substrate real estate is consumed, inhibiting package miniaturization

Engineering Contradiction:
Improveconnector interconnectionVSAvoidpackage substrate real estate
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The connector is extracted from the package substrate and relocated to the motherboard. This removal eliminates the area occupation on the package substrate, enabling package miniaturization while preserving connector interconnection capabilities through the relocated mounting position.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

By relocating the connector from the package substrate plane to the motherboard plane, the invention utilizes a different spatial dimension for connector mounting. This dimensional transition frees up package substrate area while maintaining connector functionality through the new mounting location.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Stability of the object's composition

If additional connector components (mounting pads, retention mounting clips, alignment holes) are added, then connector stability is improved, but device complexity increases

Engineering Contradiction:
Improveconnector stabilityVSAvoidconnector components
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The motherboard serves multiple functions: it provides both the mounting surface for the connector and the electrical connection path. This multi-functionality eliminates the need for separate dedicated mounting structures, reducing component count while maintaining connector stability through the motherboard's inherent structural and electrical properties.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11462468B2Semiconductor package, semiconductor system, and method of forming semiconductor package
Publication Date: 2022.10.04 INTEL CORP
  • US11462468B2 patent drawing
  • US11462468B2 patent drawing
  • US11462468B2 patent drawing

AI summary

A semiconductor package may include a semiconductor device coupled to a package substrate. The semiconductor package may also include an integrated heat spreader coupled to the package substrate. The semiconductor package may further include a package connector mounted on the integrated heat spreader. According to various examples, a semiconductor system is also described. The semiconductor system may include a first semiconductor package. The first semiconductor package may include a first package connector, and a first integrated heat spreader. The first package connector may be mounted on the first integrated heat spreader. The semiconductor system may also include a second semiconductor package. The second semiconductor package may include a second package connector, and a second integrated heat spreader. The second package connector may be mounted on the second integrated heat spreader. The first package connector may be electrically connected to the second package connector.