Semiconductor Package Cover Recess for Wire Bond Clearance

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Solution Overview

Problem

The existing semiconductor packages face challenges in forming wire bonds on die bond pads due to the limited height between the cover and the die active surface, which affects the reliability and manufacturing productivity of these packages.

Innovation Solution

A method for forming a semiconductor package that includes providing a package substrate with a die region, attaching a die with a cover adhesive region on its surface, applying a cover adhesive, and attaching a protective cover with a recessed structure above the die bond pads to create an elevated space for wire bonds, followed by encapsulating the package substrate, die, and bond wires with an encapsulant.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If adhesive is employed to attach the cover to the die, then the die is protected from the environment, but the height between the bottom surface of the cover and die active surface is limited, making it challenging to form wire bonds

Engineering Contradiction:
Improvewire bond formation reliabilityVSAvoidclearance height between cover and wire bonds
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The recessed structure is formed on the bottom surface of the protective cover at specific locations corresponding to the die bond pads. This creates localized vertical dimension changes (elevated spaces) without increasing the overall package height, providing the necessary clearance for wire bonds while maintaining a compact design.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The recessed structure is not uniformly distributed but specifically positioned above the die bond pads where wire bonds need to be formed. This localized modification provides the necessary elevated space only where required, allowing wire bonds to be formed without interfering with the cover while maintaining close proximity elsewhere.

Inventive Principle:
Principle #3Local quality

2Length of stationary object

If the package height is reduced, then the package becomes more compact, but the clearance for wire bonds is insufficient

Engineering Contradiction:
Improvepackage heightVSAvoidwire bond formation ease
Core Design Contradiction:
Length of stationary objectVSEase of operation

Solution Approach 1:

Instead of increasing overall package height to provide wire bond clearance, the recessed structure introduces localized vertical variations on the cover's bottom surface. This creates elevated spaces that provide necessary clearance for wire bonds while keeping the overall package height reduced and compact.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The cover's bottom surface is segmented into different levels through the recessed structure, creating zones of different heights. The recessed areas provide elevated space for wire bonds, while the surrounding areas maintain close proximity to the die, enabling both compact packaging and easy wire bond formation.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution increases the clearance height between the cover and wire bonds, enhancing the reliability and manufacturing productivity of semiconductor packages by allowing for reduced package height without damaging the wire bonds and enabling the use of larger covers without increasing the package footprint.

Implementation Method 1

An adhesive may be employed to attach the cover to the die

Methodology Applied
Scientific EffectAdhesive bonding: Adhesive

Implementation Method 2

depositing an encapsulant on the package substrate. The encapsulant covers exposed portions of the package substrate, die and bond wires

Methodology Applied
Scientific EffectEncapsulation: Physical Containment

Data Source

PatentUS20250126909A1Reliable semiconductors packages
Publication Date: 2025.04.17 UTAC HEADQUARTERS PTE LTD
  • US20250126909A1 patent drawing
  • US20250126909A1 patent drawing
  • US20250126909A1 patent drawing

AI summary

A semiconductor package is disclosed. The package includes a package substrate having top and bottom major package substrate surfaces, the top major package surface including a die region. A die having first and second major die surfaces is attached onto the die region. The second major die surface is attached to the die region. The first major die surface includes a sensor region and a cover adhesive region surrounding the sensor region. The package also includes applying a cover adhesive to the cover adhesive region on the first major die surface. A protective cover with first and second major cover surfaces and side surfaces is attached to the die using the cover adhesive. The second major cover surface contacts the cover adhesive. The protective cover covers the sensor region. The protective cover includes a recessed structure on the second major cover surface. The recessed structure is located above die bond pads on the die to create an elevated space over peak portions of wire bonds on the die bond pads. An encapsulant is disposed on the package substrate to cover exposed portions of the package substrate, die and bond wires and side surfaces of the protective cover, while leaving the first major cover surface exposed.