Electronic Component Package Cutout Design for Capacitive Coupling Reduction

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Solution Overview

Problem

The existing electronic component housing packages face increased distance between leads and external circuit boards, leading to reduced capacity coupling and inability to dispose leads at high density without increased capacitance between adjacent leads.

Innovation Solution

The electronic component housing package incorporates cutout portions on the input/output member that extend from the gaps between wiring conductors to the outer surface, reducing capacitive coupling by interposing an air layer with a lower dielectric constant, allowing for closer wiring conductor placement and improved high-frequency properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If leads are disposed at high density, then integration density is improved, but capacitive coupling between adjacent leads increases

Engineering Contradiction:
Improveintegration densityVSAvoidcapacitive coupling
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

A dielectric member is introduced as an intermediary substance between adjacent leads to reduce capacitive coupling. The dielectric member has a lower dielectric constant than the surrounding medium, thereby acting as a mediator that reduces the harmful capacitive coupling effect while allowing high-density lead arrangement.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dielectric member is selectively positioned only in specific regions where capacitive coupling needs to be reduced, rather than uniformly throughout the entire structure. This local application allows high-density lead disposal in areas where coupling reduction is critical, while maintaining integration density elsewhere.

Inventive Principle:
Principle #3Local quality

2Object-affected harmful factors

If distance between leads and external circuit board is increased, then capacity coupling between leads and external circuit board is reduced, but package size increases

Engineering Contradiction:
Improvecapacity couplingVSAvoidpackage size
Core Design Contradiction:
Object-affected harmful factorsVSVolume of moving object

Solution Approach 1:

The dielectric member serves as an intermediary that reduces capacitive coupling between leads and the external circuit board without requiring increased distance. By placing the dielectric member with lower dielectric constant between the leads and board, the harmful capacity coupling is reduced while maintaining compact package dimensions.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If leads are disposed at high density, then integration density is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveintegration densityVSAvoidlead positioning precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The dielectric member is strategically positioned in specific locations between leads to reduce capacitive coupling, rather than requiring uniform precision control across all lead positions. This localized approach reduces the overall manufacturing precision requirements while still enabling high-density lead disposal.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enables a compact package with enhanced high-frequency performance and closer wiring conductor spacing, reducing capacitive coupling and facilitating impedance matching, thereby achieving good electric properties and high integration density.

Implementation Method 1

capacity coupling created between adjacent leads via the dielectric base material cannot be largely reduced

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Implementation Method 2

reducing capacitive coupling by interposing an air layer with a lower dielectric constant

Methodology Applied
Scientific EffectDielectric constant: Dielectric Permittivity

Data Source

PatentEP3118895B1Package for housing an electronic component and electronic device including the package
Publication Date: 2020.04.01 KYOCERA CORP
  • EP3118895B1 patent drawingFigure 1
  • EP3118895B1 patent drawingFigure 2
  • EP3118895B1 patent drawingFigure 3

AI summary

An electronic component housing package (10) includes a substrate (11) having an upper surface including a mount region (R) on which an electronic component (20) is to be mounted; a frame body (12) disposed on the upper surface of the substrate (11) so as to surround the mount region (R), the frame body being provided with a through-hole portion (H); and an input/output member (13) disposed on the frame body (12) so as to block the through-hole portion (H), the input/output member having a plurality of wiring conductors (131) which are to be electrically connected to the electronic component (20), the wiring conductors (131) extending to an inside and outside of the frame body (12) and also extending along a lower surface of the input/output member on the outside of the frame body (12). The input/output member (13) is provided with a cutout portion (C) which is cut out so as to extend from a gap between the plurality of wiring conductors (131) on the lower surface along the wiring conductors (131) to an outer side surface of the input/output member (13). It is possible to provide a compact electronic component housing package (10) which has good electric properties.