Semiconductor Package Dam and Trench Layout for Film Overflow Control

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Solution Overview

Problem

Semiconductor packages face challenges in achieving high performance and reliability while maintaining a compact size, as the close packing of semiconductor chips and wires leads to issues with non-conductive film overflow, affecting adhesion and connection reliability.

Innovation Solution

Incorporating a dam and trench structure on the substrate's surface to control the flow of non-conductive film, preventing overflow and enhancing the performance of the overflow prevention unit, which improves the stability and reliability of the semiconductor package without increasing the substrate's surface area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor chips and wires are closely packed to achieve high performance and capacity, then the package density and performance are improved, but non-conductive film overflow occurs affecting adhesion and connection reliability

Engineering Contradiction:
Improvepackage densityVSAvoidconnection reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The substrate surface is segmented into distinct regions by the dam structure, which divides the packaging area into a first region for semiconductor chips and a second region for wires. This segmentation prevents non-conductive film from flowing between regions, ensuring reliable connections while maintaining high package density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The dam structure acts as an intermediary barrier between the semiconductor chip region and wire region. It controls the flow of non-conductive film, allowing it to fill appropriately in the chip region while preventing overflow into the wire region, thus protecting connection reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the substrate surface area is increased to accommodate overflow prevention structures, then non-conductive film overflow is prevented, but the substrate size and package footprint increase

Engineering Contradiction:
Improveadhesion stabilityVSAvoidsubstrate surface area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Instead of preventing overflow by increasing horizontal substrate area, the solution uses a vertical dam structure that rises from the substrate surface. This dimensional change allows effective overflow prevention within the same footprint, maintaining compact package size while ensuring adhesion stability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The dam structure functions as a thin barrier film that effectively contains the non-conductive material without requiring substantial additional space. This thin-film approach prevents overflow while minimizing impact on substrate surface area and package footprint.

Inventive Principle:
Principle #30Flexible shells and thin films

3Reliability

If complex overflow prevention structures are added to control non-conductive film flow, then connection reliability is improved, but device complexity increases

Engineering Contradiction:
Improvewire connection stabilityVSAvoidsubstrate structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dam structure is strategically placed only where needed - at the boundary between chip and wire regions - rather than uniformly across the entire substrate. This localized approach provides effective overflow control for wire connections while minimizing overall structural complexity and maintaining manufacturing simplicity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20240355777A1Packaged integrated circuit devices with enhanced dam structures that provide increased yield and reliability
Publication Date: 2024.10.24 SAMSUNG ELECTRONICS CO LTD
  • US20240355777A1 patent drawing
  • US20240355777A1 patent drawing
  • US20240355777A1 patent drawing

AI summary

A semiconductor package includes a substrate, a first semiconductor chip on an upper surface of the substrate, and electrically conductive bumps extending between and electrically connected to the substrate and the first semiconductor chip. A non-conductive film layer is provided, which has at least a portion extending between the electrically conductive bumps. A second semiconductor chip is provided, which extends on the upper surface of the substrate. Electrically conductive wires are provided that electrically connect respective portions of the second semiconductor chip to respective portions of the upper surface of the substrate. In addition, the upper surface of the substrate includes a dam, which protrudes between one of: (i) a region overlapping the second semiconductor chip, and (ii) a region connected to the wires and a region overlapping the first semiconductor chip. The upper surface of the substrate may also include a trench recessed alongside at least a portion of the dam.