Microelectronic Package Debug Access Ports

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current microelectronic packages lack effective debugging solutions once attached to a motherboard, as desoldering disrupts the electrical state and has limited rework cycles, and field debugging is impractical due to accessibility issues.

Innovation Solution

Incorporating debug access ports within or on the microelectronic package, such as debug traces and solder bumps, to enable external probing without desoldering, allowing for electrical connection to internal circuitry for debugging purposes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If probe points are fabricated on the microelectronic substrate, then debugging access is enabled, but valuable space on the microelectronic substrate is consumed

Engineering Contradiction:
Improvedebugging accessVSAvoidmicroelectronic substrate space
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The patent moves the debugging access points from the two-dimensional substrate plane to the three-dimensional package structure by forming access ports through the encapsulant material on the package body, enabling debugging without consuming substrate area

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The debugging functionality is extracted from the substrate and relocated to the package itself, allowing the substrate to be used entirely for its primary function while the package provides both protection and debugging access

Inventive Principle:
Principle #2Taking out (Extraction)

2Ease of operation

If the microelectronic package is desoldered from the motherboard for debugging, then internal circuitry becomes accessible, but the electrical state is lost and rework cycles are limited

Engineering Contradiction:
Improvecircuitry accessibilityVSAvoidelectrical state preservation
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent introduces an intermediary debugging interface that connects to internal circuitry through the package structure itself rather than requiring physical separation, allowing debugging while maintaining the package's electrical connections and state

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The debugging access ports are built into the package structure during fabrication, enabling future debugging operations without requiring destructive desoldering or risking electrical state loss

Inventive Principle:
Principle #10Preliminary action

3Reliability

If the microelectronic package is fully encapsulated for protection, then device reliability is improved, but debugging access to internal circuitry is blocked

Engineering Contradiction:
Improvedevice protectionVSAvoiddebugging accessibility
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent applies local quality by creating specific localized access regions through the encapsulant material while maintaining the integrity and protection of the overall encapsulated structure, allowing debugging at specific points without compromising general device protection

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The encapsulant material is segmented to create discrete access ports that provide debugging pathways while leaving the rest of the encapsulation intact to maintain device protection and reliability

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10090261B2Microelectronic package debug access ports and methods of fabricating the same
Publication Date: 2018.10.02 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US10090261B2 patent drawing
  • US10090261B2 patent drawing
  • US10090261B2 patent drawing

AI summary

A microelectronic package may be fabricated with debug access ports formed either at a side or at a bottom of the microelectronic package. In one embodiment, the debug access ports may be formed within an encapsulation material proximate the microelectronic package side. In another embodiment, the debug access ports may be formed in a microelectronic interposer of the microelectronic package proximate the microelectronic package side. In a further embodiment, the debug access ports may be formed at the microelectronic package bottom and may include a solder contact.