Package Structure Integrating Decoupling Capacitor for Power Integrity

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Solution Overview

Problem

Conventional QFP and QFN packages lack internal decoupling capacitors, leading to increased impedance and parasitic components that affect power integrity, necessitating external decoupling capacitors which increase material and fabrication costs and do not provide high performance due to longer electrical loops and larger equivalent series resistance and inductance.

Innovation Solution

A package structure with a recessed portion on a carrier filled with a dielectric material, forming a decoupling capacitor between the carrier and the circuit board, eliminating the need for external decoupling capacitors and reducing the electrical loop length, equivalent series resistance, and inductance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If external decoupling capacitors are used to improve power integrity, then power integrity is improved, but material cost and fabrication cost increase

Engineering Contradiction:
Improvepower integrityVSAvoidfabrication cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges the decoupling capacitor function with the existing package structure by forming a capacitor between the power pad and ground pad through the semiconductor element and bonding wires. This integration eliminates the need for separate external decoupling capacitors, thereby improving power integrity while reducing material and fabrication costs.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If external decoupling capacitors are used to improve power integrity, then power integrity is improved, but device complexity increases

Engineering Contradiction:
Improvepower integrityVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the decoupling capacitor functionality into the existing package structure by utilizing the power pad, ground pad, semiconductor element, and bonding wires to form an integrated capacitor. This approach improves power integrity while avoiding the added complexity of separate external capacitor components and their associated mounting structures.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If conventional QFP or QFN packages are used without internal decoupling capacitors, then device complexity is reduced, but power integrity deteriorates due to increased impedance and parasitic components

Engineering Contradiction:
Improvepackage structure simplicityVSAvoidpower integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent enables the package structure to serve its own decoupling function by forming a capacitor within the package using existing components (power pad, ground pad, semiconductor element, bonding wires). This self-service approach improves power integrity by reducing impedance and parasitic effects without requiring external decoupling capacitors, thus maintaining structural simplicity.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution improves power integrity by reducing impedance between power and ground terminals, lowering costs by eliminating external components, and enhancing package performance with a shorter electrical loop and smaller parasitic components.

Implementation Method 1

forming a decoupling capacitor between the carrier and the circuit board

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

filled with a dielectric material

Methodology Applied
Scientific EffectDielectric: Dielectric

Data Source

PatentUS8981540B2Electronic device and package structure thereof
Publication Date: 2015.03.17 SILICONWARE PRECISION IND CO LTD
  • US8981540B2 patent drawing
  • US8981540B2 patent drawing
  • US8981540B2 patent drawing

AI summary

A package structure is disclosed, which includes: a carrier having a recessed portion formed on a lower side thereof and filled with a dielectric material; a semiconductor element disposed on an upper side of the carrier and electrically connected to the carrier; and an encapsulant formed on the upper side of the carrier for encapsulating the semiconductor element. Therein, the dielectric material is exposed from the encapsulant. As such, when the carrier is disposed on a circuit board, the dielectric material is sandwiched between the lower side of the carrier and the circuit board to form a decoupling capacitor, thereby improving the power integrity.