Package Structure With Embedded Passive Devices For Low ESR PDN

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Solution Overview

Problem

Current integrated passive device (IPD) integration in Power Distribution Networks (PDNs) for integrated circuits (ICs) falls short in meeting the demands for compactness, higher performance, and lower costs in smaller formats, necessitating improved packaging solutions for portable electronic products.

Innovation Solution

The method involves forming a package structure with a carrier having a de-bonding layer and dielectric layer, followed by the creation of redistribution layers (RDL) and through insulator vias (TIVs), where passive devices are integrated between TIVs and dies, and encapsulated with a planarizing process, allowing for efficient power distribution and reduced equivalent series resistance (ESR) and inductance (ESL).

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If integrated passive devices (IPD) are integrated into Power Distribution Networks for compactness, then device density and functionality are improved, but manufacturing complexity and integration difficulty increase

Engineering Contradiction:
Improvedevice densityVSAvoidintegration difficulty
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The package structure is divided into distinct functional layers including a carrier substrate, multiple redistribution layer (RDL) structures at different levels, through-insulator vias (TIVs) for vertical interconnections, and separately mounted passive devices. This segmentation allows each component to be manufactured and prepared independently before final assembly, reducing integration complexity while maintaining high device density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar integration to three-dimensional stacking by implementing multiple RDL structures at different vertical levels (first RDL, second RDL) connected through TIVs. This vertical dimensionality enables higher device density without increasing lateral footprint, while the modular layered structure simplifies the integration process by allowing independent fabrication of each layer.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of moving object

If smaller packaging form factors are used, then portability is improved, but power distribution performance and signal integrity deteriorate

Engineering Contradiction:
Improvepackage sizeVSAvoidpower distribution performance
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent employs vertical stacking of multiple RDL structures and passive devices in the Z-dimension to maintain power distribution performance within a compact lateral footprint. The through-insulator vias provide low-inductance vertical power paths that compensate for the reduced horizontal space, ensuring reliable power delivery in the smaller package format.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The design implements localized power distribution networks with passive devices (capacitors, inductors) strategically positioned near their usage points through the TIV interconnections. This local quality approach minimizes trace lengths and reduces ESR/ESL, maintaining power distribution performance despite the overall compact package size.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If higher density interconnection technologies are implemented, then functionality is improved, but manufacturing precision requirements increase

Engineering Contradiction:
ImprovefunctionalityVSAvoidalignment precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The high-density interconnection is achieved through segmented manufacturing where the carrier, RDL structures, and passive devices are fabricated separately with standard precision requirements. The modular design with defined interface structures (pads, vias) allows for straightforward alignment and bonding without requiring ultra-precise monolithic fabrication, thus maintaining functionality while reducing manufacturing precision demands.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11637097B2Method of manufacturing package structure
Publication Date: 2023.04.25 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11637097B2 patent drawing
  • US11637097B2 patent drawing
  • US11637097B2 patent drawing

AI summary

A method of manufacturing a package structure includes: forming a backside RDL structure on a carrier; forming TIVs on the backside RDL structure; mounting at least one passive device on the backside RDL structure, so that the at least one passive device is disposed between the TIVs; placing a die on the at least one passive device, so that the at least one passive device is vertically sandwiched between the die and the backside RDL structure; forming an encapsulant laterally encapsulating the die, the TIVs, and the at least one passive device; forming a front side RDL structure on a front side of the die, the TIVs, and the encapsulant; releasing the backside RDL structure from the carrier; and mounting a package on the backside RDL structure, wherein the package is electrically connected to the at least one passive device by conductive connectors and solders.