Ground Via Cluster Layout for Package Crosstalk Isolation

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Solution Overview

Problem

High-speed signal-ended buses in integrated circuit (IC) packages face limitations in data rate due to crosstalk from vertical interconnects, which can be exacerbated by the need for additional ground pins to isolate signals, leading to increased package size and manufacturing costs.

Innovation Solution

The implementation of ground via clustering, where multiple ground vias are clustered together adjacent to each other, enhances the coupling between signals and their associated grounds without increasing the package form factor, thereby mitigating crosstalk.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional ground pins are utilized to isolate signals and lower crosstalk, then signal isolation is improved, but package form factor and manufacturing cost increase

Engineering Contradiction:

Improvesignal isolationVSAvoidpackage form factor

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

Multiple ground vias are merged into clustered groups adjacent to signal vias, creating concentrated ground regions that provide enhanced signal isolation without requiring additional ground pins. The clustering combines the ground function of multiple vias into a compact structure that fits within the existing package footprint.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The solution transitions from a planar arrangement of ground pins to a three-dimensional via cluster structure. By stacking multiple ground vias vertically and arranging them in clusters adjacent to signal vias, the design utilizes the vertical dimension to increase ground coupling effectiveness without expanding the horizontal package area.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Reliability

If additional ground pins are utilized to isolate signals and lower crosstalk, then signal isolation is improved, but manufacturing cost increases

Engineering Contradiction:

Improvesignal isolationVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The via cluster structure serves multiple functions simultaneously: it provides ground connections, creates shielding effects to reduce crosstalk, and maintains compatibility with existing package designs. This multi-functionality eliminates the need for separate additional ground pins, thereby reducing manufacturing complexity and cost.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If ground via clustering is implemented to reduce crosstalk, then crosstalk is reduced, but via density and manufacturing complexity increase

Engineering Contradiction:

Improvecrosstalk reductionVSAvoidvia clustering structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

Ground via clustering is applied locally adjacent to signal vias rather than uniformly across the entire package. This localized approach concentrates the crosstalk mitigation effort where it is most needed, creating strong ground coupling zones next to signal paths while maintaining simpler via structures in other regions.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The ground via structure is segmented into discrete clusters positioned adjacent to signal vias, rather than using a continuous ground plane or uniformly distributed ground pins. This segmentation allows for targeted crosstalk reduction at specific signal interfaces while keeping the overall via structure manageable and manufacturable.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentEP4220709B1Ground via clustering for crosstalk mitigation

Publication Date: 2025.01.29 INTEL CORP

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AI summary

The present disclosure relates to a method of making a semiconductor package, a computing device including a package substrate and a semiconductor package, comprising a package substrate having a first side and a second side opposite the first side, the package substrate comprising: a first layer of dielectric material adjacent the first side of the package substrate; a second layer of dielectric material on the first layer of dielectric material, the first layer of dielectric material being between the second layer of dielectric material and the first side of the package substrate; a ground solder ball pad adjacent the first side of the package substrate; a first via above and electrically coupled to the ground solder ball pad, the first via being in the first layer of dielectric material of the package substrate; a second via above and electrically coupled to the ground solder ball pad, the second via being in the first layer of dielectric material of the package substrate, the second via laterally spaced apart from the first via; a third via above and electrically coupled to the first via and being in the second layer of dielectric material of the package substrate; a fourth via above and electrically coupled to the second via and being in the second layer of dielectric material of the package substrate, the fourth via laterally spaced apart from the third via; wherein a first line perpendicular to the first side of the package substrate intersects the ground solder ball pad, the first via, and the third via; and wherein a second line perpendicular to the first side of the package substrate intersects the ground solder ball pad, the second via, and the fourth via; a die coupled to the second side of the package substrate; and a solder ball disposed on the ground solder ball pad.