Semiconductor Package Structure With Embedded Heat Dissipation Paths
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Solution Overview
Problem
High-power integrated circuit chips generate excessive heat, leading to increased thermal resistance and potential damage, necessitating effective heat dissipation solutions to ensure continuous and reliable operation.
Innovation Solution
A package structure incorporating a die with a substrate and device layer, featuring a heat dissipation filling structure embedded in the substrate and a substrate recess, along with a thermal interface material layer and thermal dissipation component, to reduce thermal resistance and enhance heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high-power integrated circuit chips are used to increase processing capability, then power and performance are improved, but heat generation increases leading to higher thermal resistance and potential chip damage
Solution Approach 1:
The substrate is divided into multiple regions with different thermal conductivities. High thermal conductivity material is used in the first region (heat dissipation path), while low thermal conductivity material is used in the second region (device region), allowing segmented thermal management that directs heat away from sensitive devices
Solution Approach 2:
Different regions of the substrate are assigned different thermal properties locally. The first region has high thermal conductivity optimized for heat dissipation, while the second region has low thermal conductivity to maintain device operation stability, achieving localized thermal optimization
2Reliability
If conventional packaging structures are used, then device complexity is low, but heat dissipation performance is insufficient leading to excessive thermal resistance
Solution Approach 1:
The substrate employs a composite structure combining materials with different thermal conductivities in specific regions, creating a functionally graded material distribution that optimizes both heat dissipation and device protection without requiring complex multi-layer packaging
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces thermal resistance and improves heat dissipation performance by increasing thermal conductivity and the heat dissipation area, thereby preventing damage from excessive heat and ensuring reliable operation of high-power integrated circuit chips.
Implementation Method 1
a thermal interface material layer, disposed on the back side of the substrate; and a thermal dissipation component, attached to the die through the thermal interface material layer
Implementation Method 2
the die further includes at least one of a heat dissipation filling structure and a substrate recess, the heat dissipation filling structure is embedded in the substrate
Data Source
AI summary
The embodiments of the disclosure provides a package structure and a manufacturing method thereof, the package structure includes: a die, including a substrate and a device layer, wherein the substrate has a front side and a back side opposite to each other in a first direction perpendicular to a main surface of the die, and the device layer is at the front side of the substrate; a thermal interface material layer, on the back side of the substrate; and a thermal dissipation component, attached to the die through the thermal interface material layer, the die further includes at least one of a heat dissipation filling structure and a substrate recess, the heat dissipation filling structure is embedded in the substrate and has an exposed part exposed at a sidewall of the substrate; the substrate recess is recessed from the back side of the substrate towards the device layer.