Semiconductor Package Interconnect Using Insulating and Sintered Layers

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Solution Overview

Problem

Existing bonding methods for semiconductor device packages, such as clip bonding with high-lead solder and wire bonding, are environmentally unfriendly and prone to reliability issues like corrosion and wire breakage.

Innovation Solution

A method involving the application of a non-conductive material followed by a conductive material between the die and substrate bond pad, using curable liquids and sinter pastes to form insulating and conductive layers, eliminating the need for high-lead solder and reducing susceptibility to reliability issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If clip bonding with high-lead solder is used, then electrical connection is achieved, but environmental friendliness deteriorates

Engineering Contradiction:
Improveelectrical connectionVSAvoidenvironmental friendliness
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The invention changes the material composition parameter by replacing high-lead solder with lead-free solder or alternative bonding materials, maintaining electrical connection reliability while eliminating environmental harm from lead contamination

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention uses composite bonding structures combining solder with additional materials such as underfill compounds or encapsulants to achieve both reliable electrical connection and environmental compatibility through material composition optimization

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If conventional bonding methods are used, then manufacturing process is established, but manufacturing precision deteriorates

Engineering Contradiction:
Improvebonding processVSAvoiddeposition precision
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The invention replaces conventional mechanical dispensing methods with advanced deposition techniques such as screen printing, stencil printing, or automated dispensing systems that provide precise material placement and controlled thickness for the bonding layers

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The invention optimizes manufacturing precision by controlling critical parameters including material viscosity, deposition speed, layer thickness, and curing conditions to achieve consistent and precise bonding material application

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method provides a reliable and environmentally friendly bonding solution suitable for high-power semiconductor devices, replacing copper clip bonding and high-Pb solder pastes with curable liquid materials, ensuring precise deposition and high-performance electrical connections.

Implementation Method 1

The method may further include curing the non-conductive material, thereby forming a first body of non-conductive material

Methodology Applied
Scientific EffectCuring: Photopolymerisation

Implementation Method 2

The method may further include curing the conductive material, thereby forming a second body of conductive material

Methodology Applied
Scientific EffectSintering: Sintering

Implementation Method 3

applying a conductive material, such as a conductive liquid, sinter paste or conductive particles and films

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentEP4465345A1Semiconductor device package interconnect and manufacturing method thereof
Publication Date: 2024.11.20 NEXPERIA BV
  • EP4465345A1 patent drawingFigure 1A~1C
  • EP4465345A1 patent drawingFigure 2A~2C
  • EP4465345A1 patent drawingFigure 3

AI summary

Manufacturing of a semiconductor device package 100 including a die 110, a substrate 120, a first connection area 112 and a second connection area 122, the first connection area providing an electrical connection to the die, the second connection area providing an electrical connection to a substrate bond pad, and the first and connection area facing in the same direction, wherein a non-conductive material is applied and cured between an edge of the first connection area and an edge of the second connection area and along a side of the die, and wherein a conductive material is applied and cured between the first connection area and the second connection area and along a surface of the cured non-conductive material.