Semiconductor Package Interconnection Using Measured Contact Positions

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Solution Overview

Problem

Semiconductor chips with increased I/O connections are prone to shifting or rotating during manufacturing processes, leading to defective package structures and reduced yield due to misalignment of electrical connections, which affects signal integrity and overall electrical performance.

Innovation Solution

A method for manufacturing semiconductor packages involves measuring the actual positions of electrical contacts on the chips and forming an interconnection structure based on these positions using a mask-less process to ensure accurate connection and maintain signal integrity, adhering to predetermined electrical performance criteria.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If semiconductor chips are provided with more I/O connections to achieve improved electrical performance and additional functions, then the electrical performance and functionality are improved, but the chips are more prone to shifting or rotating during manufacturing processes, leading to misalignment of electrical connections and reduced yield

Engineering Contradiction:

Improveelectrical performanceVSAvoidalignment of electrical connections

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The patent measures the actual positions of electrical contacts on semiconductor chips before forming interconnection structures. This preliminary measurement action allows the manufacturing process to compensate for any shifts or rotations that occurred during pick-and-place and molding processes, ensuring accurate alignment despite manufacturing variations

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent uses a mask-less process to form interconnection structures based on measured actual positions of electrical contacts. This approach changes the manufacturing parameter from fixed mask patterns to dynamically adjusted deposition patterns, allowing precise positioning of interconnection structures to match the actual chip positions and maintain alignment accuracy

Inventive Principle:

Principle #35Parameter changes

2Adaptability or versatility

If chips shift or rotate during pick-and-place process and/or molding process, then the manufacturing process becomes more flexible, but the effective areas of the pads are limited and it becomes more difficult to form an interconnection structure that can electrically connect the semiconductor chips

Engineering Contradiction:

Improvemanufacturing process flexibilityVSAvoidformation of interconnection structure

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent implements a feedback mechanism where the actual positions of electrical contacts are measured and used to guide the formation of interconnection structures. This feedback loop allows the manufacturing process to adapt to chip shifts or rotations, making the process flexible while maintaining the ability to form accurate interconnection structures

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The patent replaces the traditional mechanical mask alignment system with a mask-less process that uses measured position data to guide interconnection structure formation. This substitution eliminates the need for precise mechanical mask positioning and allows direct deposition based on actual chip positions, simplifying the manufacturing process despite chip movement

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If traditional manufacturing processes are used without measuring actual contact positions, then the manufacturing process is simpler, but the yield decreases due to defective package structures from shifting and rotating chips

Engineering Contradiction:

Improvemanufacturing process complexityVSAvoidyield of semiconductor package structures

Core Design Contradiction:

Device complexityVSProductivity

Solution Approach 1:

The patent performs preliminary measurement of electrical contact positions before forming interconnection structures. This additional measurement step, while increasing process complexity, prevents defects by enabling accurate alignment compensation, thereby increasing the yield of functional semiconductor package structures

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent replaces traditional mask-based alignment with a mask-less process that uses measured position data. Although this increases device complexity by adding measurement and data processing steps, it significantly improves yield by eliminating alignment errors that cause defective packages

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12394676B2Semiconductor package structure and method for manufacturing the same

Publication Date: 2025.08.19 ADVANCED SEMICON ENG INC

AI summary

A semiconductor package structure and a method for manufacturing the same are provided. The method includes: providing a package body includes a first semiconductor device, wherein the first semiconductor device includes a plurality of first electrical contacts disposed adjacent to an active surface of the first semiconductor device; measuring the actual positions of the first electrical contacts of the first semiconductor device; providing a plurality of second electrical contacts outside the first semiconductor device; and forming an interconnection structure based on the actual positions of the first electrical contacts of the first semiconductor device and the positions of the second electrical contacts satisfying a predetermined electrical performance criterion by a mask-less process, so as to connect the first electrical contacts and the second electrical contacts and maintain signal integrity during transmission.