Semiconductor Package Interposer Layout for Warpage and Thickness Control

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Solution Overview

Problem

Semiconductor device packages face performance and efficiency issues due to wafer warpage caused by mismatched coefficients of thermal expansion between semiconductor devices and package bodies, leading to thickness-related challenges in miniaturization.

Innovation Solution

The semiconductor device package design incorporates multiple conductive layers with varying pitches and dielectric layers of different hardness, along with a method of manufacturing that includes a carrier-based process to reduce thickness and prevent wafer warpage by using conductive connections as interconnection bridges between electronic components, eliminating the need for additional electronic components and their associated package bodies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor devices are stacked to one another in a package, then device integration is improved, but wafer warpage occurs due to mismatched coefficients of thermal expansion

Engineering Contradiction:
Improvedevice integrationVSAvoidwafer warpage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces an interposer as an intermediary component between stacked semiconductor devices. This interposer has a coefficient of thermal expansion that matches the semiconductor devices, serving as a thermal expansion mediator that prevents wafer warpage while enabling device stacking and integration.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the physical parameters of the package structure by using an interposer with specifically matched thermal expansion properties. This parameter matching approach resolves the thermal expansion mismatch issue, allowing high-density stacking without warpage-induced reliability problems.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If additional electronic components and package bodies are used for interconnections, then connectivity is improved, but package thickness increases

Engineering Contradiction:
ImproveconnectivityVSAvoidpackage thickness
Core Design Contradiction:
Adaptability or versatilityVSLength of moving object

Solution Approach 1:

The patent merges the interconnection function with the structural support function by using the interposer to provide both mechanical support for stacking and electrical interconnection pathways. This consolidation eliminates the need for separate additional package bodies and components, reducing overall package thickness while maintaining connectivity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The interposer serves multiple functions simultaneously: it provides structural support for stacked devices, matches thermal expansion coefficients to prevent warpage, and establishes electrical interconnections between layers. This multi-functionality reduces the need for additional dedicated components, thereby reducing package thickness.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11742324B2Semiconductor device packages and methods of manufacturing the same
Publication Date: 2023.08.29 ADVANCED SEMICON ENG INC
  • US11742324B2 patent drawing
  • US11742324B2 patent drawing
  • US11742324B2 patent drawing

AI summary

A semiconductor device package includes a first conductive layer, a second conductive layer and a third conductive layer. The first conductive layer has a first pitch. The second conductive layer has a second pitch and is arranged at two different sides of the first conductive layer. The third conductive layer has a third pitch and is disposed above the first conductive layer and the second conductive layer. The third conductive layer is electrically connected to the first conductive layer. The first pitch is smaller than the third pitch, and the third pitch is smaller than the second pitch.